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Commit Graph

26 Commits (f8bf579be2cbdd13ca1bc071c21f12aedead3eb5)

Author	SHA1	Message	Date
Stefan Holst	f8bf579be2	support concat, bus select, ISOL cells	2 years ago
Stefan Holst	f61e2b42e8	support more cells in logic sim	2 years ago
Stefan Holst	0b15f9fa18	doc improvements	2 years ago
Stefan Holst	dc76a9f517	new into demo	2 years ago
Stefan Holst	7a060b1831	support for static variations	2 years ago
Stefan Holst	44b0c887d7	random sampling of delays	2 years ago
Stefan Holst	5566b80e52	simprim, vat refactor, batchrange	2 years ago
stefan	1eb8d87884	faster logic sim, removing MVArray, BPArray	2 years ago
Stefan Holst	8da4a62bce	switch to new wave_sim, silence occupancy warnings	2 years ago
Stefan Holst	3497bfdc75	first gpu-code, cached test fixtures	2 years ago
Stefan Holst	f1ebe1487c	new wave sim	2 years ago
Stefan Holst	f0dac36ac7	interface -> io_nodes, io_loc fix	2 years ago
Stefan Holst	840b816804	Circuit pickle, STIL/SDF/techlib fixes, sdata ... - fix pin indices for various SC lib variants - SDF annotation improvements - STIL loading improvements - Support for per-simulation parameters in WaveSim - Circuit is now pickleable and comparable	2 years ago
Stefan Holst	d59d6401c8	fix stil loading and logic sim capture	3 years ago
Stefan Holst	387c436207	fix tests, version bump	3 years ago
Stefan Holst	0251d66d28	make circuit pickable and comparable	4 years ago
Stefan Holst	864230b883	initial letch support, fix capture in logic sim	4 years ago
Stefan Holst	c9445f2d79	Docs, __index__, fault injection and TechLib ... - Documentation improvements - Node and Line objects now provide __index__ - LogicSim cleanup and improvements (inject_cb, cycle, ...) - Introduce TechLib class to organize tech-specific info - More human-readable output - De-linting	4 years ago
Stefan Holst	62cf56e98a	TechLib class, remove unnecessary .index	4 years ago
Stefan Holst	ff4de6d782	de-lint and repr improvements	4 years ago
Stefan Holst	64e1de396f	New m-valued logic arrays, documentation, 0.0.2 ... - MVArray for multi-valued logic - BPArray for bit-parallel storage layout - Started documenting with Sphinx - Migrated simulators to new BPArray	4 years ago
Stefan Holst	7f035c1ac5	Migration to new logic value representation	4 years ago
Stefan Holst	7bcfbf502b	Documentation, cleanup, multi-valued logic	4 years ago
Stefan Holst	5830608527	Documenting circuit module	4 years ago
Stefan Holst	a77ac4a397	start designing new data structures for m-valued logic	4 years ago
Stefan Holst	e6ae009969	updated b14 benchmark, update wavesim capture api, expand usage examples	4 years ago
Stefan Holst	6bba7ac359	support for stripping forks and memory re-use in wavesim.	4 years ago
Stefan Holst	1af346c97a	overflow notification and wavecap statistics on GPU	4 years ago
Stefan Holst	0c5a7f56e1	Project Import	4 years ago