TechLib class, remove unnecessary .index

tests/test_sdf.py

@@ -1,5 +1,4 @@
 from kyupy import sdf, verilog
-from kyupy.saed import pin_index
 
 
 def test_parse():
@@ -81,20 +80,20 @@ def test_b14(mydir):
 def test_gates(mydir):
     c = verilog.load(mydir / 'gates.v')
     df = sdf.load(mydir / 'gates.sdf')
-    lt = df.annotation(c, pin_index, dataset=1)
+    lt = df.annotation(c, dataset=1)
     nand_a = c.cells['nandgate'].ins[0]
     nand_b = c.cells['nandgate'].ins[1]
     and_a = c.cells['andgate'].ins[0]
     and_b = c.cells['andgate'].ins[1]
 
-    assert lt[nand_a.index, 0, 0] == 0.103
-    assert lt[nand_a.index, 0, 1] == 0.127
+    assert lt[nand_a, 0, 0] == 0.103
+    assert lt[nand_a, 0, 1] == 0.127
 
-    assert lt[nand_b.index, 0, 0] == 0.086
-    assert lt[nand_b.index, 0, 1] == 0.104
+    assert lt[nand_b, 0, 0] == 0.086
+    assert lt[nand_b, 0, 1] == 0.104
 
-    assert lt[and_a.index, 0, 0] == 0.378
-    assert lt[and_a.index, 0, 1] == 0.377
+    assert lt[and_a, 0, 0] == 0.378
+    assert lt[and_a, 0, 1] == 0.377
 
-    assert lt[and_b.index, 0, 0] == 0.375
-    assert lt[and_b.index, 0, 1] == 0.370
+    assert lt[and_b, 0, 0] == 0.375
+    assert lt[and_b, 0, 1] == 0.370

tests/test_wave_sim.py

@@ -3,7 +3,6 @@ import numpy as np
 from kyupy.wave_sim import WaveSim, WaveSimCuda, wave_eval, TMIN, TMAX
 from kyupy.logic_sim import LogicSim
 from kyupy import verilog, sdf, logic
-from kyupy.saed import pin_index
 from kyupy.logic import MVArray, BPArray
 
 
@@ -128,7 +127,7 @@ def compare_to_logic_sim(wsim):
 def test_b14(mydir):
     c = verilog.load(mydir / 'b14.v.gz', branchforks=True)
     df = sdf.load(mydir / 'b14.sdf.gz')
-    lt = df.annotation(c, pin_index)
+    lt = df.annotation(c)
     wsim = WaveSim(c, lt, 8)
     compare_to_logic_sim(wsim)
 
@@ -136,7 +135,7 @@ def test_b14(mydir):
 def test_b14_strip_forks(mydir):
     c = verilog.load(mydir / 'b14.v.gz', branchforks=True)
     df = sdf.load(mydir / 'b14.sdf.gz')
-    lt = df.annotation(c, pin_index)
+    lt = df.annotation(c)
     wsim = WaveSim(c, lt, 8, strip_forks=True)
     compare_to_logic_sim(wsim)
 
@@ -144,6 +143,6 @@ def test_b14_strip_forks(mydir):
 def test_b14_cuda(mydir):
     c = verilog.load(mydir / 'b14.v.gz', branchforks=True)
     df = sdf.load(mydir / 'b14.sdf.gz')
-    lt = df.annotation(c, pin_index)
+    lt = df.annotation(c)
     wsim = WaveSimCuda(c, lt, 8)
     compare_to_logic_sim(wsim)