14 Commits

Include renames

Author	SHA1	Message	Date
Stefan Holst	d59d6401c8	fix stil loading and logic sim capture	2021-07-22 17:21:58 +09:00
Stefan Holst	387c436207	fix tests, version bump	2021-07-19 14:14:35 +09:00
Stefan Holst	0251d66d28	make circuit pickable and comparable	2021-03-28 19:35:19 +09:00
Stefan Holst	864230b883	initial letch support, fix capture in logic sim	2021-03-25 10:36:55 +09:00
Stefan Holst	62cf56e98a	TechLib class, remove unnecessary .index	2021-01-16 13:17:18 +09:00
Stefan Holst	ff4de6d782	de-lint and repr improvements	2021-01-12 15:32:18 +09:00
Stefan Holst	7f035c1ac5	Migration to new logic value representation	2020-12-21 19:16:52 +09:00
Stefan Holst	7bcfbf502b	Documentation, cleanup, multi-valued logic	2020-12-20 17:44:04 +09:00
Stefan Holst	5830608527	Documenting circuit module	2020-12-18 21:14:00 +09:00
Stefan Holst	a77ac4a397	start designing new data structures for m-valued logic	2020-12-14 14:06:18 +09:00
Stefan Holst	e6ae009969	updated b14 benchmark, update wavesim capture api, expand usage examples	2020-11-29 22:32:47 +09:00
Stefan Holst	6bba7ac359	support for stripping forks and memory re-use in wavesim.	2020-11-28 10:39:13 +09:00
Stefan Holst	1af346c97a	overflow notification and wavecap statistics on GPU	2020-11-23 15:11:42 +09:00
Stefan Holst	0c5a7f56e1	Project Import	2020-10-29 16:45:33 +09:00