840b816804
Circuit pickle, STIL/SDF/techlib fixes, sdata
...
- fix pin indices for various SC lib variants
- SDF annotation improvements
- STIL loading improvements
- Support for per-simulation parameters in WaveSim
- Circuit is now pickleable and comparable
3 years ago
d59d6401c8
fix stil loading and logic sim capture
4 years ago
387c436207
fix tests, version bump
4 years ago
0251d66d28
make circuit pickable and comparable
5 years ago
864230b883
initial letch support, fix capture in logic sim
5 years ago
Stefan Holst
c9445f2d79
Docs, __index__, fault injection and TechLib
...
- Documentation improvements
- Node and Line objects now provide __index__
- LogicSim cleanup and improvements (inject_cb, cycle, ...)
- Introduce TechLib class to organize tech-specific info
- More human-readable output
- De-linting
5 years ago
Stefan Holst
62cf56e98a
TechLib class, remove unnecessary .index
5 years ago
Stefan Holst
ff4de6d782
de-lint and repr improvements
5 years ago
Stefan Holst
64e1de396f
New m-valued logic arrays, documentation, 0.0.2
...
- MVArray for multi-valued logic
- BPArray for bit-parallel storage layout
- Started documenting with Sphinx
- Migrated simulators to new BPArray
5 years ago
Stefan Holst
7f035c1ac5
Migration to new logic value representation
5 years ago
Stefan Holst
7bcfbf502b
Documentation, cleanup, multi-valued logic
5 years ago
Stefan Holst
5830608527
Documenting circuit module
5 years ago
Stefan Holst
a77ac4a397
start designing new data structures for m-valued logic
5 years ago
e6ae009969
updated b14 benchmark, update wavesim capture api, expand usage examples
5 years ago
Stefan Holst
6bba7ac359
support for stripping forks and memory re-use in wavesim.
5 years ago
Stefan Holst
1af346c97a
overflow notification and wavecap statistics on GPU
5 years ago
Stefan Holst
0c5a7f56e1
Project Import
5 years ago
Stefan Holst
Stefan Holst