Stefan Holst
f0b55eed27
version bump
3 weeks ago
Stefan Holst
3700ae9b33
need 3.12 for generic types
3 weeks ago
Stefan Holst
df695e0aa1
for release 0.0.6
...
- sim: added LogicSim2V, LogicSim4V, LogicSim6V (faster and simpler API)
- sim: fixed model for: many-input gates in bench; dangling nodes; POs that drive further logic
- Circuit: dot output fix and better style, fixed equivalence check of lines and nodes.
- Techlib: Added KYUPY library with supported simulation primitives for debug and testing
- tests: fixed and added more for better coverage
- more type annotations
- updated project config and dependencies for better uv experience, newer lark, newer numpy
3 weeks ago
Stefan Holst
a28128830d
beginning simple always block parsing in verilog
3 weeks ago
Stefan Holst
20cf441abb
add doc gen dependencies
3 weeks ago
Stefan Holst
5ac21edbb1
migrate readme to markdown
3 weeks ago
Stefan Holst
f0d74777af
add dff to techlib
3 weeks ago
Stefan Holst
3848665533
ignore more generated python files
3 weeks ago
Stefan Holst
541cccd756
fix sim model for PO that also drive further logic
3 weeks ago
Stefan Holst
fed66f85cb
fix oob in test
3 weeks ago
Stefan Holst
2eb10f83b0
add pytest dev dependency
3 weeks ago
Stefan Holst
dd4e5c861a
fix sim model generation for circuits with dangling nodes
4 weeks ago
Stefan Holst
9cebbcce8f
support for storing responses separately
1 month ago
stefan
31434cfd51
4v sim, fixed 6v sim, better testing
1 month ago
stefan
ce94210b52
adding more types
1 month ago
Stefan Holst
09420fd72c
new logic sim interface prototype, simprim lib and test
1 month ago
Stefan Holst
5bcc1c1d77
new synthetic techlib with kyupy simprims
1 month ago
Stefan Holst
df8a58f57b
generate proper simprims in bench parser
1 month ago
Stefan Holst
3dfd0cb60d
euivalence test, op format doc
2 months ago
Stefan Holst
21439e3595
circuit objects and nodes/lines of different circuits are not quivalent.
2 months ago
Stefan Holst
88a5c79161
dot fix and updated intro nb
2 months ago
Stefan Holst
9ca437fe47
fault injection for 4v sim, wave_sim test fix
2 months ago
Stefan Holst
0cdaf71963
fix for latest lark
2 months ago
Stefan Holst
75972d7bb2
numba config deprecated
2 months ago
Stefan Holst
469dc18aa9
lark dependency update
2 months ago
stefan
33addab141
fix output with newest numpy
2 months ago
Stefan Holst
674f3dea4a
Merge branch 'main' into devel
6 months ago
Stefan Holst
55d62ff354
sphinx config
6 months ago
Stefan Holst
e311b1098a
sphinx config
6 months ago
Stefan Holst
aea633ac8d
for release 0.0.5
...
* Techlib: fix NanGate variants
* Circuit: more visitor and manipulator utilities
* mv_transition: produce stable values when arguments are UNASSIGNED
* Verilog: better assign processing
* STIL parsing improvements
* SDF: conditional parsing (semantics ignored for now), better interconnect annotation, more robust name matching
* sim: use ALAP topo-sort
* logic_sim: improved fault injection, faster 6V sim
* wave_sim: use correct thresholds for pulse filtering, partial delta-sim support, per-sim delay factor
* log: fix limiter
6 months ago
Stefan Holst
187d176cfd
partial ternary if support
7 months ago
Stefan Holst
ba1de0bea9
support for per-simulation delay factors
11 months ago
Stefan Holst
5769aa3716
deactivate delta sim
11 months ago
Stefan Holst
e97c370d39
support stuck-at fault model injection for 2-valued logic sim
1 year ago
Stefan Holst
3b7106be80
fix deferred assignments
1 year ago
Stefan Holst
d2357859f6
more robust matching and assign processing
2 years ago
Stefan Holst
53629c5c28
support injection into specific sims
2 years ago
Stefan Holst
e64845e8c0
fanout generator
2 years ago
Stefan Holst
da98ca2db7
signal flips in compiled code
2 years ago
Stefan Holst
deb4599206
fix tests
2 years ago
Stefan Holst
c1c9ec9aae
pin_name, cleanup legacy code
2 years ago
Stefan Holst
4c55dcec60
delta sim for improving fault sim performance
2 years ago
Stefan Holst
a4b7364478
mux21 in 6v logic sim, more test fixtures
2 years ago
Stefan Holst
f59e97afa9
remove hashes, add lst, overflow, ebuf
2 years ago
Stefan Holst
f6baf9cb5e
a fast 6v sim
2 years ago
Stefan Holst
fc030c6708
allow interconnect annotations without forks
2 years ago
795cac0716
initial and final values from mvarrays
2 years ago
3a8777e0a3
none-filtering iterator for GrowingList
2 years ago
68e8cb844a
pass line id to inject_cb
2 years ago
Stefan Holst
1a3b91c1c0
fix comment
2 years ago
