Commit Graph

  • 02f3a0e1b2 correct timing padding Stefan Holst 2023-02-28 09:39:01 +0900
  • fc8e65e788 bit-packing utility Stefan Holst 2023-02-28 09:38:28 +0900
  • d80a3ae2b1 timer utility Stefan Holst 2023-02-28 09:38:02 +0900
  • 7bfc02e683 more on-gpu code, bump python requirement Stefan Holst 2023-02-26 22:37:15 +0900
  • 8da4a62bce switch to new wave_sim, silence occupancy warnings Stefan Holst 2023-02-26 13:54:01 +0900
  • 3497bfdc75 first gpu-code, cached test fixtures Stefan Holst 2023-02-26 13:09:49 +0900
  • f1ebe1487c new wave sim Stefan Holst 2023-02-26 11:04:38 +0900
  • f0dac36ac7 interface -> io_nodes, io_loc fix Stefan Holst 2023-02-24 21:56:29 +0900
  • b2953aef25 only dff Stefan Holst 2023-02-22 13:37:15 +0900
  • 3774b14286 support ppi/ppo Stefan Holst 2023-02-22 13:32:49 +0900
  • 4847ad9c40 locating io ports and busses by name Stefan Holst 2023-02-21 23:26:48 +0900
  • 6801606dca new common scheduler for simulators Stefan Holst 2023-02-21 19:27:54 +0900
  • faf41f0863 ff transitions switch Stefan Holst 2023-02-06 09:53:44 +0900
  • 6430f10f73 HADD pin index fix Stefan Holst 2023-02-06 09:52:32 +0900
  • fa19af8c31 4-input gate simulator Stefan Holst 2023-01-18 14:34:17 +0900
  • 93a0858d2f oai and aoi pin handling fix Stefan Holst 2023-01-16 17:37:41 +0900
  • 1f2808ee31 Merge branch 'main' into devel Stefan Holst 2022-07-21 22:10:20 +0900
  • 840b816804 Circuit pickle, STIL/SDF/techlib fixes, sdata - fix pin indices for various SC lib variants - SDF annotation improvements - STIL loading improvements - Support for per-simulation parameters in WaveSim - Circuit is now pickleable and comparable Stefan Holst 2022-07-21 22:01:51 +0900
  • 163b348a0c year bump Stefan Holst 2022-07-21 18:47:25 +0900
  • ecfc692edc support reset RN for scan cells Stefan Holst 2022-07-21 17:16:35 +0900
  • afb7e745a1 adding aoi to logic sim Stefan Holst 2022-07-21 17:15:55 +0900
  • 6a8841c3c6 revert wave_eval4 Stefan Holst 2022-07-21 16:57:20 +0900
  • c530983afa accept I as a first input Stefan Holst 2022-03-17 14:57:37 +0900
  • 775b13c694 fix off-by-1 pin index when loading AOI and OAI cells Stefan Holst 2022-02-02 15:05:14 +0900
  • 584445f3b1 wave eval for 4-input gates Stefan Holst 2021-11-22 14:54:38 +0900
  • 85dd02d4d7 interpret N as unassigned in STIL Stefan Holst 2021-11-07 18:51:41 +0900
  • 7c03271048 improve robustness of sdf annotation and wave sim Stefan Holst 2021-09-01 12:57:55 +0900
  • 8bbaaf8fae comment change Stefan Holst 2021-07-26 10:52:33 +0900
  • d59d6401c8 fix stil loading and logic sim capture Stefan Holst 2021-07-22 17:21:58 +0900
  • 387c436207 fix tests, version bump Stefan Holst 2021-07-19 14:14:35 +0900
  • b981b1153c add sdata to control individual sims Stefan Holst 2021-06-17 12:05:55 +0900
  • 87d93afb44 fix time in unpickled log objects Stefan Holst 2021-03-31 11:11:25 +0900
  • c3e4090f31 make nodes and lines hashable again Stefan Holst 2021-03-28 19:44:19 +0900
  • 0251d66d28 make circuit pickable and comparable Stefan Holst 2021-03-28 19:35:19 +0900
  • 864230b883 initial letch support, fix capture in logic sim Stefan Holst 2021-03-25 10:36:55 +0900
  • d05841a6a2 Merge branch 'main' into devel Stefan Holst 2021-01-31 18:32:14 +0900
  • b17ab2d148 fixes for IWLS benchmark netlists and older STIL files Stefan Holst 2021-01-31 18:28:56 +0900
  • c5be32d7e5 doc and indent fix Stefan Holst 2021-01-31 18:25:09 +0900
  • 8434f5e694 fixes for IWLS benchmark netlists Stefan Holst 2021-01-31 16:39:47 +0900
  • 9ff2369a55 fix parsing older stil files Stefan Holst 2021-01-31 13:43:03 +0900
  • 82a53e0171 improve techlib for gsclib, better constant handling in verilog parser Stefan Holst 2021-01-31 13:41:36 +0900
  • a2df0e5682 fix ff annotation Stefan Holst 2021-01-22 18:03:18 +0900
  • ec37e11fef Merge branch 'main' into devel Stefan Holst 2021-01-16 14:56:36 +0900
  • c9445f2d79 Docs, __index__, fault injection and TechLib v0.0.3 Stefan Holst 2021-01-16 14:48:27 +0900
  • 3a5a3c128b year bump Stefan Holst 2021-01-16 13:52:18 +0900
  • ee30898cef docs for numba and cuda Stefan Holst 2021-01-16 13:35:20 +0900
  • 62cf56e98a TechLib class, remove unnecessary .index Stefan Holst 2021-01-16 13:17:18 +0900
  • dc003fa624 documentation improvements Stefan Holst 2021-01-16 00:04:34 +0900
  • 8b5a71f498 documentation improvements Stefan Holst 2021-01-15 21:28:15 +0900
  • 9c8dee31b9 assign and capture return arrays, new cycle method for common use pattern Stefan Holst 2021-01-14 20:47:22 +0900
  • 2bbdf3ee5d fix logic sim of DFF.QN output Stefan Holst 2021-01-14 15:05:39 +0900
  • 35cf63cf38 Make Node and Line indexable, documentation. Stefan Holst 2021-01-12 22:27:13 +0900
  • ff4de6d782 de-lint and repr improvements Stefan Holst 2021-01-12 15:32:18 +0900
  • c12a30328c better hr_time Stefan Holst 2021-01-12 15:18:37 +0900
  • 7e6660002b support ibuff in WaveSim Stefan Holst 2021-01-06 15:58:47 +0900
  • dfbc35eeb9 logging range fixes Stefan Holst 2021-01-06 13:56:03 +0900
  • 4f531fe4cb implement logging range Stefan Holst 2021-01-06 12:54:14 +0900
  • 18c17b5f76 more docs and reprs Stefan Holst 2021-01-06 11:32:43 +0900
  • 0bad95e94e LogicSim clean-up and new fault injection facility. version bump. Stefan Holst 2020-12-22 19:01:19 +0900
  • 64e1de396f New m-valued logic arrays, documentation, 0.0.2 v0.0.2 Stefan Holst 2020-12-21 20:44:23 +0900
  • 7501613951 remove comments Stefan Holst 2020-12-21 20:23:53 +0900
  • 5084f1dd8c demo nb run with cuda Stefan Holst 2020-12-21 20:13:48 +0900
  • 7f035c1ac5 Migration to new logic value representation Stefan Holst 2020-12-21 19:16:52 +0900
  • 7bcfbf502b Documentation, cleanup, multi-valued logic Stefan Holst 2020-12-20 17:44:04 +0900
  • 5830608527 Documenting circuit module Stefan Holst 2020-12-18 21:14:00 +0900
  • cff18e0915 start documentation Stefan Holst 2020-12-15 19:20:30 +0900
  • a77ac4a397 start designing new data structures for m-valued logic Stefan Holst 2020-12-14 14:06:18 +0900
  • 08a22cf251 move sources to src, add package info and release 0.0.1 v0.0.1 Stefan Holst 2020-12-04 17:58:33 +0900
  • 765cb70ca3 add logic depth example Stefan Holst 2020-12-03 12:15:35 +0900
  • e6ae009969 updated b14 benchmark, update wavesim capture api, expand usage examples Stefan Holst 2020-11-29 22:32:47 +0900
  • e1101b5b70 fix loading of stuck-at fault patterns, support ibuff cell Stefan Holst 2020-11-29 14:50:16 +0900
  • 6bba7ac359 support for stripping forks and memory re-use in wavesim. Stefan Holst 2020-11-28 10:39:13 +0900
  • 1af346c97a overflow notification and wavecap statistics on GPU Stefan Holst 2020-11-23 15:11:42 +0900
  • 3ad95153ab support more SAED cells, improve verilog parsing, fix inspection warnings Stefan Holst 2020-11-23 14:18:27 +0900
  • 0c5a7f56e1 Project Import Stefan Holst 2020-10-29 16:45:33 +0900
  • 7a6ab750ca
    Initial commit s-holst 2020-10-29 12:10:43 +0900