Stefan Holst
b17ab2d148
fixes for IWLS benchmark netlists and older STIL files
2021-01-31 18:28:56 +09:00
Stefan Holst
c9445f2d79
Docs, __index__, fault injection and TechLib
...
- Documentation improvements
- Node and Line objects now provide __index__
- LogicSim cleanup and improvements (inject_cb, cycle, ...)
- Introduce TechLib class to organize tech-specific info
- More human-readable output
- De-linting
2021-01-16 14:48:27 +09:00
Stefan Holst
64e1de396f
New m-valued logic arrays, documentation, 0.0.2
...
- MVArray for multi-valued logic
- BPArray for bit-parallel storage layout
- Started documenting with Sphinx
- Migrated simulators to new BPArray
2020-12-21 20:44:23 +09:00
Stefan Holst
08a22cf251
move sources to src, add package info and release 0.0.1
2020-12-04 17:58:33 +09:00
Stefan Holst
6bba7ac359
support for stripping forks and memory re-use in wavesim.
2020-11-28 10:39:13 +09:00
Stefan Holst
1af346c97a
overflow notification and wavecap statistics on GPU
2020-11-23 15:11:42 +09:00
Stefan Holst
3ad95153ab
support more SAED cells, improve verilog parsing, fix inspection warnings
2020-11-23 14:18:27 +09:00
Stefan Holst
0c5a7f56e1
Project Import
2020-10-29 16:45:33 +09:00
s-holst
7a6ab750ca
Initial commit
2020-10-29 12:10:43 +09:00
Stefan Holst