51 Commits (85dd02d4d7643e97e034d487b49c93a54e1f1c9e)
 

Author SHA1 Message Date
Stefan Holst 85dd02d4d7 interpret N as unassigned in STIL 3 years ago
Stefan Holst 7c03271048 improve robustness of sdf annotation and wave sim 3 years ago
Stefan Holst 8bbaaf8fae comment change 3 years ago
Stefan Holst d59d6401c8 fix stil loading and logic sim capture 3 years ago
Stefan Holst 387c436207 fix tests, version bump 3 years ago
Stefan Holst b981b1153c add sdata to control individual sims 3 years ago
Stefan Holst 87d93afb44 fix time in unpickled log objects 4 years ago
Stefan Holst c3e4090f31 make nodes and lines hashable again 4 years ago
Stefan Holst 0251d66d28 make circuit pickable and comparable 4 years ago
Stefan Holst 864230b883 initial letch support, fix capture in logic sim 4 years ago
Stefan Holst d05841a6a2 Merge branch 'main' into devel 4 years ago
Stefan Holst b17ab2d148 fixes for IWLS benchmark netlists and older STIL files 4 years ago
Stefan Holst c5be32d7e5 doc and indent fix 4 years ago
Stefan Holst 8434f5e694 fixes for IWLS benchmark netlists 4 years ago
Stefan Holst 9ff2369a55 fix parsing older stil files 4 years ago
Stefan Holst 82a53e0171 improve techlib for gsclib, better constant handling in verilog parser 4 years ago
Stefan Holst a2df0e5682 fix ff annotation 4 years ago
Stefan Holst ec37e11fef Merge branch 'main' into devel 4 years ago
Stefan Holst c9445f2d79 Docs, __index__, fault injection and TechLib 4 years ago
Stefan Holst 3a5a3c128b year bump 4 years ago
Stefan Holst ee30898cef docs for numba and cuda 4 years ago
Stefan Holst 62cf56e98a TechLib class, remove unnecessary .index 4 years ago
Stefan Holst dc003fa624 documentation improvements 4 years ago
Stefan Holst 8b5a71f498 documentation improvements 4 years ago
Stefan Holst 9c8dee31b9 assign and capture return arrays, new cycle method for common use pattern 4 years ago
Stefan Holst 2bbdf3ee5d fix logic sim of DFF.QN output 4 years ago
Stefan Holst 35cf63cf38 Make Node and Line indexable, documentation. 4 years ago
Stefan Holst ff4de6d782 de-lint and repr improvements 4 years ago
Stefan Holst c12a30328c better hr_time 4 years ago
Stefan Holst 7e6660002b support ibuff in WaveSim 4 years ago
Stefan Holst dfbc35eeb9 logging range fixes 4 years ago
Stefan Holst 4f531fe4cb implement logging range 4 years ago
Stefan Holst 18c17b5f76 more docs and reprs 4 years ago
Stefan Holst 0bad95e94e LogicSim clean-up and new fault injection facility. version bump. 4 years ago
Stefan Holst 64e1de396f New m-valued logic arrays, documentation, 0.0.2 4 years ago
Stefan Holst 7501613951 remove comments 4 years ago
Stefan Holst 5084f1dd8c demo nb run with cuda 4 years ago
Stefan Holst 7f035c1ac5 Migration to new logic value representation 4 years ago
Stefan Holst 7bcfbf502b Documentation, cleanup, multi-valued logic 4 years ago
Stefan Holst 5830608527 Documenting circuit module 4 years ago
Stefan Holst cff18e0915 start documentation 4 years ago
Stefan Holst a77ac4a397 start designing new data structures for m-valued logic 4 years ago
Stefan Holst 08a22cf251 move sources to src, add package info and release 0.0.1 4 years ago
Stefan Holst 765cb70ca3 add logic depth example 4 years ago
Stefan Holst e6ae009969 updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
Stefan Holst e1101b5b70 fix loading of stuck-at fault patterns, support ibuff cell 4 years ago
Stefan Holst 6bba7ac359 support for stripping forks and memory re-use in wavesim. 4 years ago
Stefan Holst 1af346c97a overflow notification and wavecap statistics on GPU 4 years ago
Stefan Holst 3ad95153ab support more SAED cells, improve verilog parsing, fix inspection warnings 4 years ago
Stefan Holst 0c5a7f56e1 Project Import 4 years ago