15 Commits (821ead0c7a7219ccc1fd70790bbf0301957e8629)
 

Author SHA1 Message Date
Stefan Holst 821ead0c7a add readthedocs conf for py3.8 1 year ago
Stefan Holst 351d809306 for release 0.0.4 1 year ago
Stefan Holst 840b816804 Circuit pickle, STIL/SDF/techlib fixes, sdata 2 years ago
Stefan Holst b17ab2d148 fixes for IWLS benchmark netlists and older STIL files 4 years ago
Stefan Holst c9445f2d79 Docs, __index__, fault injection and TechLib 4 years ago
Stefan Holst 64e1de396f New m-valued logic arrays, documentation, 0.0.2 4 years ago
Stefan Holst 08a22cf251 move sources to src, add package info and release 0.0.1 4 years ago
Stefan Holst 765cb70ca3 add logic depth example 4 years ago
Stefan Holst e6ae009969 updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
Stefan Holst e1101b5b70 fix loading of stuck-at fault patterns, support ibuff cell 4 years ago
Stefan Holst 6bba7ac359 support for stripping forks and memory re-use in wavesim. 4 years ago
Stefan Holst 1af346c97a overflow notification and wavecap statistics on GPU 4 years ago
Stefan Holst 3ad95153ab support more SAED cells, improve verilog parsing, fix inspection warnings 4 years ago
Stefan Holst 0c5a7f56e1 Project Import 4 years ago
s-holst 7a6ab750ca
Initial commit 4 years ago