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Commit Graph

90 Commits (7a060b183151a4dc956da2998e11d15db9bfdc76)

 

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Author	SHA1	Message	Date
Stefan Holst	b17ab2d148	fixes for IWLS benchmark netlists and older STIL files	5 years ago
Stefan Holst	c5be32d7e5	doc and indent fix	5 years ago
Stefan Holst	8434f5e694	fixes for IWLS benchmark netlists	5 years ago
Stefan Holst	9ff2369a55	fix parsing older stil files	5 years ago
Stefan Holst	82a53e0171	improve techlib for gsclib, better constant handling in verilog parser	5 years ago
Stefan Holst	a2df0e5682	fix ff annotation	5 years ago
Stefan Holst	ec37e11fef	Merge branch 'main' into devel	5 years ago
Stefan Holst	c9445f2d79	Docs, __index__, fault injection and TechLib ... - Documentation improvements - Node and Line objects now provide __index__ - LogicSim cleanup and improvements (inject_cb, cycle, ...) - Introduce TechLib class to organize tech-specific info - More human-readable output - De-linting	5 years ago
Stefan Holst	3a5a3c128b	year bump	5 years ago
Stefan Holst	ee30898cef	docs for numba and cuda	5 years ago
Stefan Holst	62cf56e98a	TechLib class, remove unnecessary .index	5 years ago
Stefan Holst	dc003fa624	documentation improvements	5 years ago
Stefan Holst	8b5a71f498	documentation improvements	5 years ago
Stefan Holst	9c8dee31b9	assign and capture return arrays, new cycle method for common use pattern	5 years ago
Stefan Holst	2bbdf3ee5d	fix logic sim of DFF.QN output	5 years ago
Stefan Holst	35cf63cf38	Make Node and Line indexable, documentation.	5 years ago
Stefan Holst	ff4de6d782	de-lint and repr improvements	5 years ago
Stefan Holst	c12a30328c	better hr_time	5 years ago
Stefan Holst	7e6660002b	support ibuff in WaveSim	5 years ago
Stefan Holst	dfbc35eeb9	logging range fixes	5 years ago
Stefan Holst	4f531fe4cb	implement logging range	5 years ago
Stefan Holst	18c17b5f76	more docs and reprs	5 years ago
Stefan Holst	0bad95e94e	LogicSim clean-up and new fault injection facility. version bump.	5 years ago
Stefan Holst	64e1de396f	New m-valued logic arrays, documentation, 0.0.2 ... - MVArray for multi-valued logic - BPArray for bit-parallel storage layout - Started documenting with Sphinx - Migrated simulators to new BPArray	5 years ago
Stefan Holst	7501613951	remove comments	5 years ago
Stefan Holst	5084f1dd8c	demo nb run with cuda	5 years ago
Stefan Holst	7f035c1ac5	Migration to new logic value representation	5 years ago
Stefan Holst	7bcfbf502b	Documentation, cleanup, multi-valued logic	5 years ago
Stefan Holst	5830608527	Documenting circuit module	5 years ago
Stefan Holst	cff18e0915	start documentation	5 years ago
Stefan Holst	a77ac4a397	start designing new data structures for m-valued logic	5 years ago
Stefan Holst	08a22cf251	move sources to src, add package info and release 0.0.1	5 years ago
Stefan Holst	765cb70ca3	add logic depth example	5 years ago
Stefan Holst	e6ae009969	updated b14 benchmark, update wavesim capture api, expand usage examples	5 years ago
Stefan Holst	e1101b5b70	fix loading of stuck-at fault patterns, support ibuff cell	5 years ago
Stefan Holst	6bba7ac359	support for stripping forks and memory re-use in wavesim.	5 years ago
Stefan Holst	1af346c97a	overflow notification and wavecap statistics on GPU	5 years ago
Stefan Holst	3ad95153ab	support more SAED cells, improve verilog parsing, fix inspection warnings	5 years ago
Stefan Holst	0c5a7f56e1	Project Import	5 years ago
s-holst	7a6ab750ca	Initial commit	5 years ago