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Author	SHA1	Message	Date
Stefan Holst	7f035c1ac5	Migration to new logic value representation	2020-12-21 19:16:52 +09:00
Stefan Holst	7bcfbf502b	Documentation, cleanup, multi-valued logic	2020-12-20 17:44:04 +09:00
Stefan Holst	5830608527	Documenting circuit module	2020-12-18 21:14:00 +09:00
Stefan Holst	cff18e0915	start documentation	2020-12-15 19:20:30 +09:00
Stefan Holst	a77ac4a397	start designing new data structures for m-valued logic	2020-12-14 14:06:18 +09:00
Stefan Holst	08a22cf251	move sources to src, add package info and release 0.0.1	2020-12-04 17:58:33 +09:00
Stefan Holst	6bba7ac359	support for stripping forks and memory re-use in wavesim.	2020-11-28 10:39:13 +09:00
Stefan Holst	1af346c97a	overflow notification and wavecap statistics on GPU	2020-11-23 15:11:42 +09:00
Stefan Holst	3ad95153ab	support more SAED cells, improve verilog parsing, fix inspection warnings	2020-11-23 14:18:27 +09:00
Stefan Holst	0c5a7f56e1	Project Import	2020-10-29 16:45:33 +09:00
s-holst	7a6ab750ca	Initial commit	2020-10-29 12:10:43 +09:00