stefan/kyupy
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Author SHA1 Message Date
Stefan Holst 4e2022291e fix cuda ppo_to_ppi 2023-03-15 15:15:22 +09:00
Stefan Holst 5566b80e52 simprim, vat refactor, batchrange 2023-03-15 10:37:39 +09:00
stefan 63c0b48537 bump 2023-03-14 18:50:15 +09:00
stefan 6520ee23ef cleanup and new intro notebook 2023-03-14 17:40:50 +09:00
stefan 1810d40959 pytest work without cuda 2023-03-13 23:18:32 +09:00
Stefan Holst 7430ebb068 jitted logic sim 2023-03-13 23:15:20 +09:00
stefan 89f317b463 better circuit statsu, 2v logic sim 2023-03-13 10:50:44 +09:00
Stefan Holst 753ce566e4 Timer improvements, log in yaml 2023-03-13 10:45:41 +09:00
stefan 1eb8d87884 faster logic sim, removing MVArray, BPArray 2023-03-12 23:59:10 +09:00
stefan 02f3a0e1b2 correct timing padding 2023-02-28 09:39:01 +09:00
stefan fc8e65e788 bit-packing utility 2023-02-28 09:38:28 +09:00
stefan d80a3ae2b1 timer utility 2023-02-28 09:38:02 +09:00
Stefan Holst 7bfc02e683 more on-gpu code, bump python requirement 2023-02-26 22:37:15 +09:00
Stefan Holst 8da4a62bce switch to new wave_sim, silence occupancy warnings 2023-02-26 13:54:01 +09:00
stefan 3497bfdc75 first gpu-code, cached test fixtures 2023-02-26 13:09:49 +09:00
stefan f1ebe1487c new wave sim 2023-02-26 11:04:38 +09:00
stefan f0dac36ac7 interface -> io_nodes, io_loc fix 2023-02-24 21:56:29 +09:00
Stefan Holst b2953aef25 only dff 2023-02-22 13:37:15 +09:00
Stefan Holst 3774b14286 support ppi/ppo 2023-02-22 13:32:49 +09:00
Stefan Holst 4847ad9c40 locating io ports and busses by name 2023-02-21 23:26:48 +09:00
Stefan Holst 6801606dca new common scheduler for simulators 2023-02-21 19:27:54 +09:00
Stefan Holst faf41f0863 ff transitions switch 2023-02-06 09:53:44 +09:00
Stefan Holst 6430f10f73 HADD pin index fix 2023-02-06 09:52:32 +09:00
Stefan Holst fa19af8c31 4-input gate simulator 2023-01-18 14:34:17 +09:00
Stefan Holst 93a0858d2f oai and aoi pin handling fix 2023-01-16 17:37:41 +09:00
Stefan Holst 1f2808ee31 Merge branch 'main' into devel 2022-07-21 22:10:20 +09:00
Stefan Holst 840b816804 Circuit pickle, STIL/SDF/techlib fixes, sdata 
- fix pin indices for various SC lib variants
- SDF annotation improvements
- STIL loading improvements
- Support for per-simulation parameters in WaveSim
- Circuit is now pickleable and comparable
 2022-07-21 22:01:51 +09:00
Stefan Holst 163b348a0c year bump 2022-07-21 18:47:25 +09:00
Stefan Holst ecfc692edc support reset RN for scan cells 2022-07-21 17:16:59 +09:00
Stefan Holst afb7e745a1 adding aoi to logic sim 2022-07-21 17:16:59 +09:00
stefan 6a8841c3c6 revert wave_eval4 2022-07-21 16:57:20 +09:00
Stefan Holst c530983afa accept I as a first input 2022-03-17 14:57:37 +09:00
Stefan Holst 775b13c694 fix off-by-1 pin index when loading AOI and OAI cells 2022-02-02 15:05:14 +09:00
Stefan Holst 584445f3b1 wave eval for 4-input gates 2021-11-22 14:54:38 +09:00
Stefan Holst 85dd02d4d7 interpret N as unassigned in STIL 2021-11-07 18:51:41 +09:00
Stefan Holst 7c03271048 improve robustness of sdf annotation and wave sim 2021-09-01 12:57:55 +09:00
Stefan Holst 8bbaaf8fae comment change 2021-07-26 10:52:33 +09:00
Stefan Holst d59d6401c8 fix stil loading and logic sim capture 2021-07-22 17:21:58 +09:00
Stefan Holst 387c436207 fix tests, version bump 2021-07-19 14:14:35 +09:00
Stefan Holst b981b1153c add sdata to control individual sims 2021-06-17 12:05:55 +09:00
stefan 87d93afb44 fix time in unpickled log objects 2021-03-31 11:11:25 +09:00
Stefan Holst c3e4090f31 make nodes and lines hashable again 2021-03-28 19:44:19 +09:00
Stefan Holst 0251d66d28 make circuit pickable and comparable 2021-03-28 19:35:19 +09:00
Stefan Holst 864230b883 initial letch support, fix capture in logic sim 2021-03-25 10:36:55 +09:00
Stefan Holst d05841a6a2 Merge branch 'main' into devel 2021-01-31 18:32:14 +09:00
Stefan Holst b17ab2d148 fixes for IWLS benchmark netlists and older STIL files 2021-01-31 18:28:56 +09:00
Stefan Holst c5be32d7e5 doc and indent fix 2021-01-31 18:25:09 +09:00
Stefan Holst 8434f5e694 fixes for IWLS benchmark netlists 2021-01-31 16:40:00 +09:00
Stefan Holst 9ff2369a55 fix parsing older stil files 2021-01-31 13:43:03 +09:00
Stefan Holst 82a53e0171 improve techlib for gsclib, better constant handling in verilog parser 2021-01-31 13:41:36 +09:00