Stefan Holst
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3a5a3c128b
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year bump
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2021-01-16 13:52:18 +09:00 |
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Stefan Holst
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ee30898cef
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docs for numba and cuda
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2021-01-16 13:35:20 +09:00 |
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Stefan Holst
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62cf56e98a
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TechLib class, remove unnecessary .index
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2021-01-16 13:17:18 +09:00 |
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Stefan Holst
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dc003fa624
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documentation improvements
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2021-01-16 00:04:34 +09:00 |
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Stefan Holst
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8b5a71f498
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documentation improvements
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2021-01-15 21:28:15 +09:00 |
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Stefan Holst
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35cf63cf38
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Make Node and Line indexable, documentation.
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2021-01-12 22:27:13 +09:00 |
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Stefan Holst
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ff4de6d782
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de-lint and repr improvements
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2021-01-12 15:32:18 +09:00 |
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Stefan Holst
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18c17b5f76
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more docs and reprs
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2021-01-06 11:32:43 +09:00 |
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Stefan Holst
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0bad95e94e
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LogicSim clean-up and new fault injection facility. version bump.
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2020-12-22 19:01:19 +09:00 |
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Stefan Holst
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7501613951
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remove comments
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2020-12-21 20:23:53 +09:00 |
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Stefan Holst
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7f035c1ac5
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Migration to new logic value representation
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2020-12-21 19:16:52 +09:00 |
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Stefan Holst
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7bcfbf502b
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Documentation, cleanup, multi-valued logic
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2020-12-20 17:44:04 +09:00 |
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Stefan Holst
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5830608527
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Documenting circuit module
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2020-12-18 21:14:00 +09:00 |
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Stefan Holst
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cff18e0915
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start documentation
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2020-12-15 19:20:30 +09:00 |
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Stefan Holst
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a77ac4a397
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start designing new data structures for m-valued logic
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2020-12-14 14:06:18 +09:00 |
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Stefan Holst
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08a22cf251
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move sources to src, add package info and release 0.0.1
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2020-12-04 17:58:33 +09:00 |
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Stefan Holst
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6bba7ac359
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support for stripping forks and memory re-use in wavesim.
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2020-11-28 10:39:13 +09:00 |
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Stefan Holst
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1af346c97a
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overflow notification and wavecap statistics on GPU
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2020-11-23 15:11:42 +09:00 |
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Stefan Holst
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3ad95153ab
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support more SAED cells, improve verilog parsing, fix inspection warnings
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2020-11-23 14:18:27 +09:00 |
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Stefan Holst
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0c5a7f56e1
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Project Import
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2020-10-29 16:45:33 +09:00 |
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s-holst
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7a6ab750ca
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Initial commit
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2020-10-29 12:10:43 +09:00 |
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