Stefan Holst stefan

• Joined on Jun 20, 2018

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stefan pushed to main at stefan/fsim

• d30ad50b3c partitioning for ppsfp
• 2928b5129c prepare partitioning for multi-thread ppsfp
• 6b99576f0b improve s27 test and comment
• 1647b41737 simplify simple, more results, bump kyupy with sim fix
• Compare 4 commits »

3 days ago

stefan pushed to devel at stefan/kyupy

• f0c10633bf disconnect unused clk from dff to prevent spurious sanity check fails

5 days ago

stefan pushed to devel at stefan/kyupy

• ed9b5c6cd6 fix sim scheduler for circuits with POs that are also used internally

5 days ago

stefan pushed to devel at stefan/kyupy

• e19463d249 fix LogicSim for 2v, deterministic sim schedule, towards sub-sims for partitions

7 days ago

stefan pushed to main at stefan/fsim

• d83bd73b36 results from Kelvin

2 weeks ago

stefan pushed to main at stefan/fsim

• 301eebf289 ppsfp finished
• 8ef19cf053 tests for safsim and wip ppsfp implementation
• Compare 2 commits »

2 weeks ago

stefan pushed to devel at stefan/kyupy

• 7a69ce9016 sort times

2 weeks ago

stefan pushed to main at stefan/fsim

• e8348f26c0 add atpg patterns for testing
• a0cbf7c296 fix pass-through case
• 3d25b50a13 add docs and fix suprious detects in incremental
• 13d847b833 add test fixtures, update kyupy
• Compare 4 commits »

2 weeks ago

stefan pushed to devel at stefan/kyupy

• f5af7ec3d9 typing and docs for interpret, mvarray

2 weeks ago

stefan pushed to main at stefan/fsim

• a0763d6124 implement an incremental fsim

2 weeks ago

stefan pushed to devel at stefan/kyupy

• 53309f9e59 simple incremental sim using dirty flags

2 weeks ago

stefan pushed to main at stefan/fsim

• 7ae0569e30 add c7552

2 weeks ago

stefan pushed to devel at stefan/kyupy

• c90bc89522 construct input connected to output on passthrough connection

2 weeks ago

stefan pushed to main at stefan/fsim

• 25a65f1ace fix default pattern argument

2 weeks ago

stefan pushed to main at stefan/fsim

• 9a41edda4c move baseline into class, support for pattern list import, fault list export, avoid resolving circuits twice.

2 weeks ago

stefan pushed to devel at stefan/kyupy

• bda89dc1b0 support for simple text-based pattern format

2 weeks ago

stefan pushed to main at stefan/fsim

• 5ba1f11d1d cleaner docs, sim perf

3 weeks ago

stefan pushed to devel at stefan/kyupy

• 449bf9a031 more flexible progress logging
• df463826ae fix ffr
• Compare 2 commits »

3 weeks ago

stefan pushed to devel at stefan/kyupy

• aebdf9540d pin_name type annotations
• 9dc58f8c40 dev deps
• e8a9025c56 fix dot graph construction
• Compare 3 commits »

3 weeks ago

stefan pushed to devel at stefan/kyupy

• 8aa0f09254 logic_sim: better docs, deprecate LogicSim, move tests to newer classes
• 4f7e605819 use tlib functions to identify ffs and latches
• c1ea05555e fix verilog tests
• e7b5567d87 let SimOps refuse building broken sim models.
• 3a2cfb7788 techlib decides on cell type comb/dff/latch
• Compare 5 commits »

3 weeks ago