Tree: d97555e9e9

devel

main

v0.0.1

v0.0.2

v0.0.3

v0.0.4

Branches Tags

${ item.name }

Create tag ${ searchTerm }

Create branch ${ searchTerm }

from 'd97555e9e9'

${ noResults }

Commit Graph

5 Commits (d97555e9e96ff03e2444aac45240c65a9c54cab9)

Author	SHA1	Message	Date
Stefan Holst	670fb0b3fc	circuit node substitution	1 year ago
Stefan Holst	f0dac36ac7	interface -> io_nodes, io_loc fix	2 years ago
Stefan Holst	840b816804	Circuit pickle, STIL/SDF/techlib fixes, sdata ... - fix pin indices for various SC lib variants - SDF annotation improvements - STIL loading improvements - Support for per-simulation parameters in WaveSim - Circuit is now pickleable and comparable	2 years ago
Stefan Holst	0251d66d28	make circuit pickable and comparable	4 years ago
Stefan Holst	64e1de396f	New m-valued logic arrays, documentation, 0.0.2 ... - MVArray for multi-valued logic - BPArray for bit-parallel storage layout - Started documenting with Sphinx - Migrated simulators to new BPArray	4 years ago
Stefan Holst	5830608527	Documenting circuit module	4 years ago
Stefan Holst	0c5a7f56e1	Project Import	4 years ago