stefan/kyupy
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Author SHA1 Message Date
stefan 3193df726f need 3.12 for generic types 2025-11-27 21:50:54 +09:00
stefan d247115744 for release 0.0.6 
- sim: added LogicSim2V, LogicSim4V, LogicSim6V (faster and simpler API)
- sim: fixed model for: many-input gates in bench; dangling nodes; POs that drive further logic
- Circuit: dot output fix and better style, fixed equivalence check of lines and nodes.
- Techlib: Added KYUPY library with supported simulation primitives for debug and testing
- tests: fixed and added more for better coverage
- more type annotations
- updated project config and dependencies for better uv experience, newer lark, newer numpy
 2025-11-27 21:35:45 +09:00
stefan 55d62ff354 sphinx config 2025-06-23 15:54:31 +09:00
stefan e311b1098a sphinx config 2025-06-23 15:45:35 +09:00
stefan aea633ac8d for release 0.0.5 
* Techlib: fix NanGate variants
* Circuit: more visitor and manipulator utilities
* mv_transition: produce stable values when arguments are UNASSIGNED
* Verilog: better assign processing
* STIL parsing improvements
* SDF: conditional parsing (semantics ignored for now), better interconnect annotation, more robust name matching
* sim: use ALAP topo-sort
* logic_sim: improved fault injection, faster 6V sim
* wave_sim: use correct thresholds for pulse filtering, partial delta-sim support, per-sim delay factor
* log: fix limiter
 2025-06-23 15:39:55 +09:00