Stefan Holst
2 years ago
1 changed files with 305 additions and 0 deletions
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import math |
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from bisect import bisect, insort_left |
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import numpy as np |
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class SimPrim: |
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BUF1 = 0b1010_1010_1010_1010 |
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INV1 = 0b0101_0101_0101_0101 |
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NAND4 = 0b0111_1111_1111_1111 |
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NAND3 = 0b0111_1111_0111_1111 |
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NAND2 = 0b0111_0111_0111_0111 |
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NOR4 = 0b0000_0000_0000_0001 |
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NOR3 = 0b0000_0001_0000_0001 |
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NOR2 = 0b0001_0001_0001_0001 |
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AND4 = 0b1000_0000_0000_0000 |
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AND3 = 0b1000_0000_1000_0000 |
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AND2 = 0b1000_1000_1000_1000 |
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OR4 = 0b1111_1111_1111_1110 |
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OR3 = 0b1111_1110_1111_1110 |
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OR2 = 0b1110_1110_1110_1110 |
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XOR4 = 0b0110_1001_1001_0110 |
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XOR3 = 0b1001_0110_1001_0110 |
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XOR2 = 0b0110_0110_0110_0110 |
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XNOR4 = 0b1001_0110_0110_1001 |
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XNOR3 = 0b0110_1001_0110_1001 |
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XNOR2 = 0b1001_1001_1001_1001 |
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AO22 = 0b1111_1000_1000_1000 |
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AOI22 = 0b0000_0111_0111_0111 |
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AO21 = 0b1110_1010_1110_1010 |
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AOI21 = 0b0001_0101_0001_0101 |
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OA22 = 0b1110_1110_1110_0000 |
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OAI22 = 0b0001_0001_0001_1111 |
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OA21 = 0b1010_1000_1010_1000 |
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OAI21 = 0b0101_0111_0101_0111 |
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MUX21 = 0b1110_0100_1110_0100 |
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kind_prefixes = { |
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'nand': (NAND4, NAND3, NAND2), |
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'nor': (NOR4, NOR3, NOR2), |
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'and': (AND4, AND3, AND2), |
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'or': (OR4, OR3, OR2), |
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'xor': (XOR4, XOR3, XOR2), |
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'xnor': (XNOR4, XNOR3, XNOR2), |
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'not': (INV1, INV1, INV1), |
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'inv': (INV1, INV1, INV1), |
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'ibuf': (INV1, INV1, INV1), |
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'__const1__': (INV1, INV1, INV1), |
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'tieh': (INV1, INV1, INV1), |
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'buf': (BUF1, BUF1, BUF1), |
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'nbuf': (BUF1, BUF1, BUF1), |
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'delln': (BUF1, BUF1, BUF1), |
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'__const0__': (BUF1, BUF1, BUF1), |
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'tiel': (BUF1, BUF1, BUF1), |
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'ao22': (AO22, AO22, AO22), |
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'aoi22': (AOI22, AOI22, AOI22), |
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'ao21': (AO21, AO21, AO21), |
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'aoi21': (AOI21, AOI21, AOI21), |
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'oa22': (OA22, OA22, OA22), |
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'oai22': (OAI22, OAI22, OAI22), |
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'oa21': (OA21, OA21, OA21), |
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'oai21': (OAI21, OAI21, OAI21), |
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'mux21': (MUX21, MUX21, MUX21), |
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} |
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@classmethod |
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def names(cls): |
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return dict([(v, k) for k, v in cls.__dict__.items() if isinstance(v, int)]) |
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class Heap: |
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def __init__(self): |
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self.chunks = dict() # map start location to chunk size |
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self.released = list() # chunks that were released |
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self.current_size = 0 |
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self.max_size = 0 |
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def alloc(self, size): |
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for idx, loc in enumerate(self.released): |
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if self.chunks[loc] == size: |
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del self.released[idx] |
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return loc |
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if self.chunks[loc] > size: # split chunk |
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chunksize = self.chunks[loc] |
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self.chunks[loc] = size |
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self.chunks[loc + size] = chunksize - size |
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self.released[idx] = loc + size # move released pointer: loc -> loc+size |
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return loc |
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# no previously released chunk; make new one |
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loc = self.current_size |
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self.chunks[loc] = size |
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self.current_size += size |
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self.max_size = max(self.max_size, self.current_size) |
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return loc |
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def free(self, loc): |
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size = self.chunks[loc] |
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if loc + size == self.current_size: # end of managed area, remove chunk |
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del self.chunks[loc] |
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self.current_size -= size |
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# check and remove prev chunk if free |
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if len(self.released) > 0: |
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prev = self.released[-1] |
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if prev + self.chunks[prev] == self.current_size: |
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chunksize = self.chunks[prev] |
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del self.chunks[prev] |
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del self.released[-1] |
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self.current_size -= chunksize |
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return |
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released_idx = bisect(self.released, loc) |
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if released_idx < len(self.released) and loc + size == self.released[released_idx]: # next chunk is free, merge |
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chunksize = size + self.chunks[loc + size] |
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del self.chunks[loc + size] |
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self.chunks[loc] = chunksize |
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size = self.chunks[loc] |
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self.released[released_idx] = loc |
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else: |
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insort_left(self.released, loc) # put in a new release |
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if released_idx > 0: # check if previous chunk is free |
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prev = self.released[released_idx - 1] |
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if prev + self.chunks[prev] == loc: # previous chunk is adjacent to freed one, merge |
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chunksize = size + self.chunks[prev] |
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del self.chunks[loc] |
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self.chunks[prev] = chunksize |
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del self.released[released_idx] |
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def __repr__(self): |
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r = [] |
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for loc in sorted(self.chunks.keys()): |
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size = self.chunks[loc] |
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released_idx = bisect(self.released, loc) |
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is_released = released_idx > 0 and len(self.released) > 0 and self.released[released_idx - 1] == loc |
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r.append(f'{loc:5d}: {"free" if is_released else "used"} {size}') |
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return "\n".join(r) |
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class Schedule: |
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"""A static scheduler that translates a Circuit into a topologically sorted list of basic logic operations (self.ops) and |
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a value allocation table (self.vat) for use in simulators. |
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:param circuit: The circuit to create a schedule for. |
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:param strip_forks: If enabled, the scheduler will not include fork nodes to safe simulation time. |
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Stripping forks will cause interconnect delay annotations of lines read by fork nodes to be ignored. |
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:param keep_signals: If disabled, memory of intermediate signal waveforms will be re-used. This greatly reduces |
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memory footprint, but intermediate signal waveforms become unaccessible after a propagation. |
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""" |
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def __init__(self, circuit, strip_forks=False, keep_signals=True, signal_caps=1): |
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self.circuit = circuit |
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self.interface = list(circuit.interface) + [n for n in circuit.nodes if 'dff' in n.kind.lower()] |
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if isinstance(signal_caps, int): |
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signal_caps = [signal_caps] * len(circuit.lines) |
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# indices for state allocation table (sat) |
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self.zero_idx = len(circuit.lines) |
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self.tmp_idx = self.zero_idx + 1 |
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self.ppi_offset = self.tmp_idx + 1 |
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self.ppo_offset = self.ppi_offset + len(self.interface) |
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self.vat_length = self.ppo_offset + len(self.interface) |
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# translate circuit structure into self.ops |
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ops = [] |
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interface_dict = dict((n, i) for i, n in enumerate(self.interface)) |
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for n in circuit.topological_order(): |
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if n in interface_dict: |
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inp_idx = self.ppi_offset + interface_dict[n] |
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if len(n.outs) > 0 and n.outs[0] is not None: # first output of a PI/PPI |
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ops.append((SimPrim.BUF1, n.outs[0].index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx)) |
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if 'dff' in n.kind.lower(): # second output of DFF is inverted |
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if len(n.outs) > 1 and n.outs[1] is not None: |
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ops.append((SimPrim.INV1, n.outs[1].index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx)) |
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else: # if not DFF, no output is inverted. |
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for o_line in n.outs[1:]: |
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if o_line is not None: |
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ops.append((SimPrim.BUF1, o_line.index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx)) |
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continue |
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# regular node, not PI/PPI or PO/PPO |
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o0_idx = n.outs[0].index if len(n.outs) > 0 and n.outs[0] is not None else self.tmp_idx |
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i0_idx = n.ins[0].index if len(n.ins) > 0 and n.ins[0] is not None else self.zero_idx |
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i1_idx = n.ins[1].index if len(n.ins) > 1 and n.ins[1] is not None else self.zero_idx |
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i2_idx = n.ins[2].index if len(n.ins) > 2 and n.ins[2] is not None else self.zero_idx |
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i3_idx = n.ins[3].index if len(n.ins) > 3 and n.ins[3] is not None else self.zero_idx |
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kind = n.kind.lower() |
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if kind == '__fork__': |
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if not strip_forks: |
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for o_line in n.outs: |
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if o_line is not None: |
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ops.append((SimPrim.BUF1, o_line.index, i0_idx, i1_idx, i2_idx, i3_idx)) |
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continue |
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sp = None |
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for prefix, prims in SimPrim.kind_prefixes.items(): |
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if kind.startswith(prefix): |
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sp = prims[0] |
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if i3_idx == self.zero_idx: |
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sp = prims[1] |
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if i2_idx == self.zero_idx: |
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sp = prims[2] |
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break |
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if sp is None: |
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print('unknown gate type', kind) |
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else: |
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ops.append((sp, o0_idx, i0_idx, i1_idx, i2_idx, i3_idx)) |
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self.ops = np.asarray(ops, dtype='int32') |
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# create a map from fanout lines to stem lines for fork stripping |
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stems = np.zeros(self.vat_length, dtype='int32') - 1 # default to -1: 'no fanout line' |
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if strip_forks: |
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for f in circuit.forks.values(): |
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prev_line = f.ins[0] |
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while prev_line.driver.kind == '__fork__': |
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prev_line = prev_line.driver.ins[0] |
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stem_idx = prev_line.index |
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for ol in f.outs: |
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stems[ol] = stem_idx |
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# calculate level (distance from PI/PPI) and reference count for each line |
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levels = np.zeros(self.vat_length, dtype='int32') |
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ref_count = np.zeros(self.vat_length, dtype='int32') |
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level_starts = [0] |
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current_level = 1 |
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for i, op in enumerate(self.ops): |
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# if we fork-strip, always take the stems for determining fan-in level |
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i0_idx = stems[op[2]] if stems[op[2]] >= 0 else op[2] |
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i1_idx = stems[op[3]] if stems[op[3]] >= 0 else op[3] |
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i2_idx = stems[op[4]] if stems[op[4]] >= 0 else op[4] |
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i3_idx = stems[op[5]] if stems[op[5]] >= 0 else op[5] |
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if levels[i0_idx] >= current_level or levels[i1_idx] >= current_level or levels[i2_idx] >= current_level or levels[i3_idx] >= current_level: |
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current_level += 1 |
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level_starts.append(i) |
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levels[op[1]] = current_level # set level of the output line |
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ref_count[i0_idx] += 1 |
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ref_count[i1_idx] += 1 |
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ref_count[i2_idx] += 1 |
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ref_count[i3_idx] += 1 |
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self.level_starts = np.asarray(level_starts, dtype='int32') |
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self.level_stops = np.asarray(level_starts[1:] + [len(self.ops)], dtype='int32') |
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# state allocation table. maps line and interface indices to self.state memory locations |
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self.vat = np.zeros((self.vat_length, 3), dtype='int') |
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self.vat[:, 0] = -1 |
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h = Heap() |
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# allocate and keep memory for special fields |
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self.vat[self.zero_idx] = h.alloc(1), 1, 0 |
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self.vat[self.tmp_idx] = h.alloc(1), 1, 0 |
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ref_count[self.zero_idx] += 1 |
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ref_count[self.tmp_idx] += 1 |
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# allocate and keep memory for PI/PPI, keep memory for PO/PPO (allocated later) |
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for i, n in enumerate(self.interface): |
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if len(n.outs) > 0: |
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self.vat[self.ppi_offset + i] = h.alloc(1), 1, 0 |
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ref_count[self.ppi_offset + i] += 1 |
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if len(n.ins) > 0: |
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i0_idx = stems[n.ins[0]] if stems[n.ins[0]] >= 0 else n.ins[0] |
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ref_count[i0_idx] += 1 |
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# allocate memory for the rest of the circuit |
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for op_start, op_stop in zip(self.level_starts, self.level_stops): |
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free_list = [] |
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for op in self.ops[op_start:op_stop]: |
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# if we fork-strip, always take the stems |
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i0_idx = stems[op[2]] if stems[op[2]] >= 0 else op[2] |
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i1_idx = stems[op[3]] if stems[op[3]] >= 0 else op[3] |
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i2_idx = stems[op[4]] if stems[op[4]] >= 0 else op[4] |
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i3_idx = stems[op[5]] if stems[op[5]] >= 0 else op[5] |
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ref_count[i0_idx] -= 1 |
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ref_count[i1_idx] -= 1 |
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ref_count[i2_idx] -= 1 |
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ref_count[i3_idx] -= 1 |
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if ref_count[i0_idx] <= 0: free_list.append(self.vat[i0_idx, 0]) |
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if ref_count[i1_idx] <= 0: free_list.append(self.vat[i1_idx, 0]) |
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if ref_count[i2_idx] <= 0: free_list.append(self.vat[i2_idx, 0]) |
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if ref_count[i3_idx] <= 0: free_list.append(self.vat[i3_idx, 0]) |
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o_idx = op[1] |
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cap = signal_caps[o_idx] |
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self.vat[o_idx] = h.alloc(cap), cap, 0 |
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if not keep_signals: |
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for loc in free_list: |
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h.free(loc) |
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# copy memory location and capacity from stems to fanout lines |
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for lidx, stem in enumerate(stems): |
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if stem >= 0: # if at a fanout line |
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self.vat[lidx] = self.vat[stem] |
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# copy memory location to PO/PPO area |
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for i, n in enumerate(self.interface): |
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if len(n.ins) > 0: |
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self.vat[self.ppo_offset + i] = self.vat[n.ins[0]] |
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self.state_length = h.max_size |
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