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@ -343,8 +343,15 @@ class Circuit: |
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the signal lines are connected appropriately. The number and arrangement |
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the signal lines are connected appropriately. The number and arrangement |
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of the input and output ports must match the pins of the replaced node. |
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of the input and output ports must match the pins of the replaced node. |
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""" |
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""" |
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ios = set(impl.io_nodes) |
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impl_in_lines = [n.outs[0] for n in impl.io_nodes if len(n.ins) == 0] |
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impl_in_lines = [n.outs[0] for n in impl.io_nodes if len(n.ins) == 0] |
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impl_out_lines = [n.ins[0] for n in impl.io_nodes if len(n.ins) > 0] |
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impl_out_lines = [n.ins[0] for n in impl.io_nodes if len(n.ins) > 0] |
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designated_cell = None |
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if len(impl_out_lines) > 0: |
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n = impl_out_lines[0].driver |
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while n.kind == '__fork__' and n not in ios: |
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n = n.ins[0].driver |
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designated_cell = n |
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node_in_lines = list(node.ins) + [None] * (len(impl_in_lines)-len(node.ins)) |
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node_in_lines = list(node.ins) + [None] * (len(impl_in_lines)-len(node.ins)) |
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node_out_lines = list(node.outs) + [None] * (len(impl_out_lines)-len(node.outs)) |
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node_out_lines = list(node.outs) + [None] * (len(impl_out_lines)-len(node.outs)) |
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assert len(node_in_lines) == len(impl_in_lines) |
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assert len(node_in_lines) == len(impl_in_lines) |
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@ -356,7 +363,8 @@ class Circuit: |
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ios = set(impl.io_nodes) |
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ios = set(impl.io_nodes) |
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for n in impl.nodes: # add all nodes to main circuit |
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for n in impl.nodes: # add all nodes to main circuit |
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if n not in ios: |
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if n not in ios: |
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node_map[n] = Node(self, node.name + '~' + n.name, n.kind) |
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suffix = '' if n == designated_cell else f'~{n.name}' |
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node_map[n] = Node(self, node.name + suffix, n.kind) |
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elif len(n.outs) > 0 and len(n.ins) > 0: # output is also read by impl. circuit, need to add a fork. |
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elif len(n.outs) > 0 and len(n.ins) > 0: # output is also read by impl. circuit, need to add a fork. |
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node_map[n] = Node(self, node.name + '~' + n.name) |
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node_map[n] = Node(self, node.name + '~' + n.name) |
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for l in impl.lines: # add all internal lines to main circuit |
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for l in impl.lines: # add all internal lines to main circuit |
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