|
|
@ -343,7 +343,7 @@ class Circuit: |
|
|
|
the signal lines are connected appropriately. The number and arrangement |
|
|
|
the signal lines are connected appropriately. The number and arrangement |
|
|
|
of the input and output ports must match the pins of the replaced node. |
|
|
|
of the input and output ports must match the pins of the replaced node. |
|
|
|
""" |
|
|
|
""" |
|
|
|
impl_in_lines = [n.outs[0] for n in impl.io_nodes if len(n.outs) > 0] |
|
|
|
impl_in_lines = [n.outs[0] for n in impl.io_nodes if len(n.ins) == 0] |
|
|
|
impl_out_lines = [n.ins[0] for n in impl.io_nodes if len(n.ins) > 0] |
|
|
|
impl_out_lines = [n.ins[0] for n in impl.io_nodes if len(n.ins) > 0] |
|
|
|
node_in_lines = list(node.ins) + [None] * (len(impl_in_lines)-len(node.ins)) |
|
|
|
node_in_lines = list(node.ins) + [None] * (len(impl_in_lines)-len(node.ins)) |
|
|
|
node_out_lines = list(node.outs) + [None] * (len(impl_out_lines)-len(node.outs)) |
|
|
|
node_out_lines = list(node.outs) + [None] * (len(impl_out_lines)-len(node.outs)) |
|
|
@ -354,24 +354,28 @@ class Circuit: |
|
|
|
node.remove() |
|
|
|
node.remove() |
|
|
|
node_map = dict() |
|
|
|
node_map = dict() |
|
|
|
ios = set(impl.io_nodes) |
|
|
|
ios = set(impl.io_nodes) |
|
|
|
for n in impl.nodes: |
|
|
|
for n in impl.nodes: # add all nodes to main circuit |
|
|
|
if n not in ios: |
|
|
|
if n not in ios: |
|
|
|
node_map[n] = Node(self, node.name + '~' + n.name, n.kind) |
|
|
|
node_map[n] = Node(self, node.name + '~' + n.name, n.kind) |
|
|
|
for l in impl.lines: |
|
|
|
elif len(n.outs) > 0 and len(n.ins) > 0: # output is also read by impl. circuit, need to add a fork. |
|
|
|
if l in in_lines_map: |
|
|
|
node_map[n] = Node(self, node.name + '~' + n.name) |
|
|
|
ll = in_lines_map[l] |
|
|
|
for l in impl.lines: # add all internal lines to main circuit |
|
|
|
if ll is not None: |
|
|
|
if l.reader in node_map and l.driver in node_map: |
|
|
|
|
|
|
|
Line(self, (node_map[l.driver], l.driver_pin), (node_map[l.reader], l.reader_pin)) |
|
|
|
|
|
|
|
for l, ll in in_lines_map.items(): # connect inputs |
|
|
|
|
|
|
|
if ll is None: continue |
|
|
|
ll.reader = node_map[l.reader] |
|
|
|
ll.reader = node_map[l.reader] |
|
|
|
ll.reader_pin = l.reader_pin |
|
|
|
ll.reader_pin = l.reader_pin |
|
|
|
ll.reader.ins[ll.reader_pin] = ll |
|
|
|
ll.reader.ins[ll.reader_pin] = ll |
|
|
|
elif l in out_lines_map: |
|
|
|
for l, ll in out_lines_map.items(): # connect outputs |
|
|
|
ll = out_lines_map[l] |
|
|
|
if ll is None: continue |
|
|
|
if ll is not None: |
|
|
|
if len(l.reader.outs) > 0: # output is also read by impl. circuit, connect to fork. |
|
|
|
|
|
|
|
ll.driver = node_map[l.reader] |
|
|
|
|
|
|
|
ll.driver_pin = len(l.reader.outs) |
|
|
|
|
|
|
|
else: |
|
|
|
ll.driver = node_map[l.driver] |
|
|
|
ll.driver = node_map[l.driver] |
|
|
|
ll.driver_pin = l.driver_pin |
|
|
|
ll.driver_pin = l.driver_pin |
|
|
|
ll.driver.outs[ll.driver_pin] = ll |
|
|
|
ll.driver.outs[ll.driver_pin] = ll |
|
|
|
else: |
|
|
|
|
|
|
|
Line(self, (node_map[l.driver], l.driver_pin), (node_map[l.reader], l.reader_pin)) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
def copy(self): |
|
|
|
def copy(self): |
|
|
|
"""Returns a deep copy of the circuit. |
|
|
|
"""Returns a deep copy of the circuit. |
|
|
|