Stefan Holst 2 years ago
parent
commit
3875dc38f9
  1. 2
      src/kyupy/logic_sim.py
  2. 1
      src/kyupy/wave_sim.py

2
src/kyupy/logic_sim.py

@ -106,7 +106,7 @@ class LogicSim(sim.SimOps):
Use this function for simulating consecutive clock cycles. Use this function for simulating consecutive clock cycles.
For 2-valued or 4-valued simulations, all valued from PPOs (in ``s[1]``) and copied to the PPIs (in ``s[0]). For 2-valued or 4-valued simulations, all valued from PPOs (in ``s[1]``) and copied to the PPIs (in ``s[0]``).
For 8-valued simulations, PPI transitions are constructed from the initial values of the assignment and the For 8-valued simulations, PPI transitions are constructed from the initial values of the assignment and the
final values of the results. final values of the results.
""" """

1
src/kyupy/wave_sim.py

@ -76,7 +76,6 @@ class WaveSim(sim.SimOps):
* ``s[10]`` Overflow indicator: If non-zero, some signals in the input cone of this output had more * ``s[10]`` Overflow indicator: If non-zero, some signals in the input cone of this output had more
transitions than specified in ``c_caps``. Some transitions have been discarded, the transitions than specified in ``c_caps``. Some transitions have been discarded, the
final values in the waveforms are still valid. final values in the waveforms are still valid.
""" """
self.simctl_int = np.zeros((2, sims), dtype=np.int32) self.simctl_int = np.zeros((2, sims), dtype=np.int32)

Loading…
Cancel
Save