Stefan Holst 1 year ago
parent
commit
3875dc38f9
  1. 6
      src/kyupy/logic.py
  2. 2
      src/kyupy/logic_sim.py
  3. 5
      src/kyupy/wave_sim.py

6
src/kyupy/logic.py

@ -31,14 +31,14 @@ The axis convention is as follows:
* The **last** axis goes along patterns/vectors. I.e. ``values[...,0]`` is pattern 0, ``values[...,1]`` is pattern 1, etc. * The **last** axis goes along patterns/vectors. I.e. ``values[...,0]`` is pattern 0, ``values[...,1]`` is pattern 1, etc.
* The **second-to-last** axis goes along the I/O and flip-flops of circuits. For a circuit ``c``, this axis is usually * The **second-to-last** axis goes along the I/O and flip-flops of circuits. For a circuit ``c``, this axis is usually
``len(c.s_nodes)`` long. The values of all inputs, outputs and flip-flops are stored within the same array and the location ``len(c.s_nodes)`` long. The values of all inputs, outputs and flip-flops are stored within the same array and the location
along the second-to-last axis is determined by the order in ``c.s_nodes``. along the second-to-last axis is determined by the order in ``c.s_nodes``.
Two storage formats are used in KyuPy: Two storage formats are used in KyuPy:
* ``mv...`` (for "multi-valued"): Each logic value is stored in the least significant 3 bits of ``np.uint8``. * ``mv...`` (for "multi-valued"): Each logic value is stored in the least significant 3 bits of ``np.uint8``.
* ``bp...`` (for "bit-parallel"): Groups of 8 logic values are stored as three ``np.uint8``. This format is used * ``bp...`` (for "bit-parallel"): Groups of 8 logic values are stored as three ``np.uint8``. This format is used
for bit-parallel logic simulations. It is also more memory-efficient. for bit-parallel logic simulations. It is also more memory-efficient.
The functions in this module use the ``mv...`` and ``bp...`` prefixes to signify the storage format they operate on. The functions in this module use the ``mv...`` and ``bp...`` prefixes to signify the storage format they operate on.

2
src/kyupy/logic_sim.py

@ -106,7 +106,7 @@ class LogicSim(sim.SimOps):
Use this function for simulating consecutive clock cycles. Use this function for simulating consecutive clock cycles.
For 2-valued or 4-valued simulations, all valued from PPOs (in ``s[1]``) and copied to the PPIs (in ``s[0]). For 2-valued or 4-valued simulations, all valued from PPOs (in ``s[1]``) and copied to the PPIs (in ``s[0]``).
For 8-valued simulations, PPI transitions are constructed from the initial values of the assignment and the For 8-valued simulations, PPI transitions are constructed from the initial values of the assignment and the
final values of the results. final values of the results.
""" """

5
src/kyupy/wave_sim.py

@ -74,9 +74,8 @@ class WaveSim(sim.SimOps):
* ``s[8]`` (P)PO sampled capture value: decided by random sampling according to a given seed. * ``s[8]`` (P)PO sampled capture value: decided by random sampling according to a given seed.
* ``s[9]`` (P)PO sampled capture slack: (capture time - LST) - decided by random sampling according to a given seed. * ``s[9]`` (P)PO sampled capture slack: (capture time - LST) - decided by random sampling according to a given seed.
* ``s[10]`` Overflow indicator: If non-zero, some signals in the input cone of this output had more * ``s[10]`` Overflow indicator: If non-zero, some signals in the input cone of this output had more
transitions than specified in ``c_caps``. Some transitions have been discarded, the transitions than specified in ``c_caps``. Some transitions have been discarded, the
final values in the waveforms are still valid. final values in the waveforms are still valid.
""" """
self.simctl_int = np.zeros((2, sims), dtype=np.int32) self.simctl_int = np.zeros((2, sims), dtype=np.int32)

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