|
|
|
@ -169,7 +169,7 @@ class SimOps:
@@ -169,7 +169,7 @@ class SimOps:
|
|
|
|
|
self.tmp_idx = self.zero_idx + 1 |
|
|
|
|
self.ppi_offset = self.tmp_idx + 1 |
|
|
|
|
self.ppo_offset = self.ppi_offset + len(self.s_nodes) |
|
|
|
|
self.vat_length = self.ppo_offset + len(self.s_nodes) |
|
|
|
|
self.vat_len = self.ppo_offset + len(self.s_nodes) |
|
|
|
|
|
|
|
|
|
# translate circuit structure into self.ops |
|
|
|
|
ops = [] |
|
|
|
@ -217,7 +217,7 @@ class SimOps:
@@ -217,7 +217,7 @@ class SimOps:
|
|
|
|
|
self.ops = np.asarray(ops, dtype='int32') |
|
|
|
|
|
|
|
|
|
# create a map from fanout lines to stem lines for fork stripping |
|
|
|
|
stems = np.zeros(self.vat_length, dtype='int32') - 1 # default to -1: 'no fanout line' |
|
|
|
|
stems = np.zeros(self.vat_len, dtype='int32') - 1 # default to -1: 'no fanout line' |
|
|
|
|
if strip_forks: |
|
|
|
|
for f in circuit.forks.values(): |
|
|
|
|
prev_line = f.ins[0] |
|
|
|
@ -228,8 +228,8 @@ class SimOps:
@@ -228,8 +228,8 @@ class SimOps:
|
|
|
|
|
stems[ol] = stem_idx |
|
|
|
|
|
|
|
|
|
# calculate level (distance from PI/PPI) and reference count for each line |
|
|
|
|
levels = np.zeros(self.vat_length, dtype='int32') |
|
|
|
|
ref_count = np.zeros(self.vat_length, dtype='int32') |
|
|
|
|
levels = np.zeros(self.vat_len, dtype='int32') |
|
|
|
|
ref_count = np.zeros(self.vat_len, dtype='int32') |
|
|
|
|
level_starts = [0] |
|
|
|
|
current_level = 1 |
|
|
|
|
for i, op in enumerate(self.ops): |
|
|
|
@ -250,7 +250,7 @@ class SimOps:
@@ -250,7 +250,7 @@ class SimOps:
|
|
|
|
|
self.level_stops = np.asarray(level_starts[1:] + [len(self.ops)], dtype='int32') |
|
|
|
|
|
|
|
|
|
# state allocation table. maps line and interface indices to self.state memory locations |
|
|
|
|
self.vat = np.zeros((self.vat_length, 3), dtype='int') |
|
|
|
|
self.vat = np.zeros((self.vat_len, 3), dtype='int') |
|
|
|
|
self.vat[:, 0] = -1 |
|
|
|
|
|
|
|
|
|
h = Heap() |
|
|
|
|