Stefan Holst e6ae009969 updated b14 benchmark, update wavesim capture api, expand usage examples

2020-11-29 22:32:47 +09:00

..

__init__.py

support more SAED cells, improve verilog parsing, fix inspection warnings

2020-11-23 14:18:27 +09:00

bench.py

Project Import

2020-10-29 16:45:33 +09:00

bittools.py

Project Import

2020-10-29 16:45:33 +09:00

circuit.py

Project Import

2020-10-29 16:45:33 +09:00

logic_sim.py

fix loading of stuck-at fault patterns, support ibuff cell

2020-11-29 14:50:16 +09:00

packed_vectors.py

Project Import

2020-10-29 16:45:33 +09:00

saed.py

support more SAED cells, improve verilog parsing, fix inspection warnings

2020-11-23 14:18:27 +09:00

sdf.py

support more SAED cells, improve verilog parsing, fix inspection warnings

2020-11-23 14:18:27 +09:00

stil.py

updated b14 benchmark, update wavesim capture api, expand usage examples

2020-11-29 22:32:47 +09:00

verilog.py

support more SAED cells, improve verilog parsing, fix inspection warnings

2020-11-23 14:18:27 +09:00

wave_sim_cuda.py

updated b14 benchmark, update wavesim capture api, expand usage examples

2020-11-29 22:32:47 +09:00

wave_sim.py

updated b14 benchmark, update wavesim capture api, expand usage examples

2020-11-29 22:32:47 +09:00