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204 lines
9.2 KiB
204 lines
9.2 KiB
import numpy as np |
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from kyupy.wave_sim import WaveSim, WaveSimCuda, wave_eval_cpu, TMIN, TMAX |
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from kyupy.logic_sim import LogicSim |
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from kyupy import logic, bench, sim |
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from kyupy.logic import mvarray |
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def test_xnor2_delays(): |
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op = (sim.XNOR2, 2, 0, 1, 3, 3, -1, 0, 0) |
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#op = (0b0111, 4, 0, 1) |
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c = np.full((4*16, 1), TMAX, dtype=np.float32) # 4 waveforms of capacity 16 |
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c_locs = np.zeros((4,), dtype='int') |
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c_caps = np.zeros((4,), dtype='int') |
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ebuf = np.zeros((4, 1, 2), dtype=np.int32) |
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for i in range(4): c_locs[i], c_caps[i] = i*16, 16 # 1:1 mapping |
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delays = np.zeros((1, 4, 2, 2)) |
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delays[0, 0, 0, 0] = 0.031 # A rise -> Z rise |
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delays[0, 0, 0, 1] = 0.027 # A rise -> Z fall |
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delays[0, 0, 1, 0] = 0.033 # A fall -> Z rise |
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delays[0, 0, 1, 1] = 0.037 # A fall -> Z fall |
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delays[0, 1, 0, 0] = 0.032 # B rise -> Z rise |
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delays[0, 1, 0, 1] = 0.030 # B rise -> Z fall |
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delays[0, 1, 1, 0] = 0.038 # B fall -> Z rise |
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delays[0, 1, 1, 1] = 0.036 # B fall -> Z fall |
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simctl_int = np.asarray([0], dtype=np.int32) |
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simctl_float = np.asarray([1], dtype=np.float32) |
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def wave_assert(inputs, output): |
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for i, a in zip(inputs, c.reshape(-1,16)): a[:len(i)] = i |
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wave_eval_cpu(op, c, c_locs, c_caps, ebuf, 0, delays, simctl_int, simctl_float, 0, 0) |
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for i, v in enumerate(output): np.testing.assert_allclose(c.reshape(-1,16)[2,i], v) |
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wave_assert([[TMIN,TMAX],[TMIN,TMAX]], [TMIN,TMAX]) # XNOR(1,1) => 1 |
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wave_assert([[TMAX,TMAX],[TMIN,TMAX]], [TMAX]) # XNOR(0,1) => 0 |
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# using Afall/Zfall for pulse length, bug: was using Arise/Zfall |
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#wave_assert([[0.07, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, 0.101, 0.137, TMAX]) |
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wave_assert([[0.07, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, TMAX]) |
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wave_assert([[0.06, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, 0.091, 0.137, TMAX]) |
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def test_nand_delays(): |
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op = (sim.NAND4, 4, 0, 1, 2, 3, -1, 0, 0) |
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#op = (0b0111, 4, 0, 1) |
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c = np.full((5*16, 1), TMAX, dtype=np.float32) # 5 waveforms of capacity 16 |
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c_locs = np.zeros((5,), dtype='int') |
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c_caps = np.zeros((5,), dtype='int') |
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ebuf = np.zeros((4, 1, 2), dtype=np.int32) |
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for i in range(5): c_locs[i], c_caps[i] = i*16, 16 # 1:1 mapping |
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# SDF specifies IOPATH delays with respect to output polarity |
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# SDF pulse rejection value is determined by IOPATH causing last transition and polarity of last transition |
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delays = np.zeros((1, 5, 2, 2)) |
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delays[0, 0, 0, 0] = 0.1 # A rise -> Z rise |
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delays[0, 0, 0, 1] = 0.2 # A rise -> Z fall |
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delays[0, 0, 1, 0] = 0.1 # A fall -> Z rise |
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delays[0, 0, 1, 1] = 0.2 # A fall -> Z fall |
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delays[0, 1, :, 0] = 0.3 # as above for B -> Z |
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delays[0, 1, :, 1] = 0.4 |
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delays[0, 2, :, 0] = 0.5 # as above for C -> Z |
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delays[0, 2, :, 1] = 0.6 |
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delays[0, 3, :, 0] = 0.7 # as above for D -> Z |
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delays[0, 3, :, 1] = 0.8 |
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simctl_int = np.asarray([0], dtype=np.int32) |
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simctl_float = np.asarray([1], dtype=np.float32) |
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def wave_assert(inputs, output): |
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for i, a in zip(inputs, c.reshape(-1,16)): a[:len(i)] = i |
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wave_eval_cpu(op, c, c_locs, c_caps, ebuf, 0, delays, simctl_int, simctl_float, 0, 0) |
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for i, v in enumerate(output): np.testing.assert_allclose(c.reshape(-1,16)[4,i], v) |
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wave_assert([[TMAX,TMAX],[TMAX,TMAX],[TMIN,TMAX],[TMIN,TMAX]], [TMIN,TMAX]) # NAND(0,0,1,1) => 1 |
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wave_assert([[TMIN,TMAX],[TMAX,TMAX],[TMIN,TMAX],[TMIN,TMAX]], [TMIN,TMAX]) # NAND(1,0,1,1) => 1 |
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wave_assert([[TMIN,TMAX],[TMIN,TMAX],[TMIN,TMAX],[TMIN,TMAX]], [TMAX]) # NAND(1,1,1,1) => 0 |
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# Keep inputs C=1 and D=1. |
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wave_assert([[1,TMAX],[2,TMAX]], [TMIN,2.4,TMAX]) # _/⎺⎺⎺ NAND __/⎺⎺ => ⎺⎺⎺\___ (B->Z fall delay) |
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wave_assert([[TMIN,TMAX],[TMIN,2,TMAX]], [2.3,TMAX]) # ⎺⎺⎺⎺⎺ NAND ⎺⎺\__ => ___/⎺⎺⎺ (B->Z rise delay) |
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wave_assert([[TMIN,TMAX],[TMIN,2,2.35,TMAX]], [2.3,2.75,TMAX]) # ⎺⎺⎺⎺⎺ NAND ⎺\_/⎺ => __/⎺⎺\_ (pos pulse, .35@B -> .45@Z) |
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wave_assert([[TMIN,TMAX],[TMIN,2,2.25,TMAX]], [TMAX]) # ⎺⎺⎺⎺⎺ NAND ⎺\_/⎺ => _______ (pos pulse, .25@B -> .35@Z, filtered) |
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wave_assert([[TMIN,TMAX],[2,2.45,TMAX]], [TMIN,2.4,2.75,TMAX]) # ⎺⎺⎺⎺⎺ NAND _/⎺\_ => ⎺⎺\_/⎺⎺ (neg pulse, .45@B -> .35@Z) |
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wave_assert([[TMIN,TMAX],[2,2.35,TMAX]], [TMIN,TMAX]) # ⎺⎺⎺⎺⎺ NAND _/⎺\_ => ⎺⎺⎺⎺⎺⎺⎺ (neg pulse, .35@B -> .25@Z, filtered) |
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def test_tiny_circuit(): |
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c = bench.parse('input(x, y) output(a, o, n) a=and(x,y) o=or(x,y) n=not(x)') |
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delays = np.full((1, len(c.lines), 2, 2), 1.0) # unit delay for all lines |
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wsim = WaveSim(c, delays) |
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assert wsim.s.shape[1] == 5 |
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# values for x |
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wsim.s[:3,0,0] = 0, 10, 0 |
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wsim.s[:3,0,1] = 0, 20, 1 |
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wsim.s[:3,0,2] = 1, 30, 0 |
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wsim.s[:3,0,3] = 1, 40, 1 |
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# values for y |
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wsim.s[:3,1,0] = 1, 50, 0 |
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wsim.s[:3,1,1] = 1, 60, 0 |
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wsim.s[:3,1,2] = 1, 70, 0 |
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wsim.s[:3,1,3] = 0, 80, 1 |
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wsim.s_to_c() |
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x_c_loc = wsim.c_locs[wsim.ppi_offset+0] # check x waveforms |
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np.testing.assert_allclose(wsim.c[x_c_loc:x_c_loc+3, 0], [TMAX, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[x_c_loc:x_c_loc+3, 1], [20, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[x_c_loc:x_c_loc+3, 2], [TMIN, 30, TMAX]) |
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np.testing.assert_allclose(wsim.c[x_c_loc:x_c_loc+3, 3], [TMIN, TMAX, TMAX]) |
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y_c_loc = wsim.c_locs[wsim.ppi_offset+1] # check y waveforms |
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np.testing.assert_allclose(wsim.c[y_c_loc:y_c_loc+3, 0], [TMIN, 50, TMAX]) |
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np.testing.assert_allclose(wsim.c[y_c_loc:y_c_loc+3, 1], [TMIN, 60, TMAX]) |
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np.testing.assert_allclose(wsim.c[y_c_loc:y_c_loc+3, 2], [TMIN, 70, TMAX]) |
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np.testing.assert_allclose(wsim.c[y_c_loc:y_c_loc+3, 3], [80, TMAX, TMAX]) |
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wsim.c_prop() |
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a_c_loc = wsim.c_locs[wsim.ppo_offset+2] # check a waveforms |
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np.testing.assert_allclose(wsim.c[a_c_loc:a_c_loc+3, 0], [TMAX, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[a_c_loc:a_c_loc+3, 1], [21, 61, TMAX]) |
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np.testing.assert_allclose(wsim.c[a_c_loc:a_c_loc+3, 2], [TMIN, 31, TMAX]) |
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np.testing.assert_allclose(wsim.c[a_c_loc:a_c_loc+3, 3], [81, TMAX, TMAX]) |
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o_c_loc = wsim.c_locs[wsim.ppo_offset+3] # check o waveforms |
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np.testing.assert_allclose(wsim.c[o_c_loc:o_c_loc+3, 0], [TMIN, 51, TMAX]) |
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np.testing.assert_allclose(wsim.c[o_c_loc:o_c_loc+3, 1], [TMIN, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[o_c_loc:o_c_loc+3, 2], [TMIN, 71, TMAX]) |
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np.testing.assert_allclose(wsim.c[o_c_loc:o_c_loc+3, 3], [TMIN, TMAX, TMAX]) |
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n_c_loc = wsim.c_locs[wsim.ppo_offset+4] # check n waveforms |
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np.testing.assert_allclose(wsim.c[n_c_loc:n_c_loc+3, 0], [TMIN, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[n_c_loc:n_c_loc+3, 1], [TMIN, 21, TMAX]) |
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np.testing.assert_allclose(wsim.c[n_c_loc:n_c_loc+3, 2], [31, TMAX, TMAX]) |
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np.testing.assert_allclose(wsim.c[n_c_loc:n_c_loc+3, 3], [TMAX, TMAX, TMAX]) |
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wsim.c_to_s() |
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# check a captures |
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np.testing.assert_allclose(wsim.s[3:7, 2, 0], [0, TMAX, TMIN, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 2, 1], [0, 21, 61, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 2, 2], [1, 31, 31, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 2, 3], [0, 81, 81, 1]) |
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# check o captures |
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np.testing.assert_allclose(wsim.s[3:7, 3, 0], [1, 51, 51, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 3, 1], [1, TMAX, TMIN, 1]) |
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np.testing.assert_allclose(wsim.s[3:7, 3, 2], [1, 71, 71, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 3, 3], [1, TMAX, TMIN, 1]) |
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# check o captures |
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np.testing.assert_allclose(wsim.s[3:7, 4, 0], [1, TMAX, TMIN, 1]) |
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np.testing.assert_allclose(wsim.s[3:7, 4, 1], [1, 21, 21, 0]) |
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np.testing.assert_allclose(wsim.s[3:7, 4, 2], [0, 31, 31, 1]) |
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np.testing.assert_allclose(wsim.s[3:7, 4, 3], [0, TMAX, TMIN, 0]) |
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def compare_to_logic_sim(wsim: WaveSim): |
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choices = np.asarray([logic.ZERO, logic.ONE, logic.RISE, logic.FALL], dtype=np.uint8) |
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rng = np.random.default_rng(10) |
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tests = rng.choice(choices, (wsim.s_len, wsim.sims)) |
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wsim.s[0] = (tests & 2) >> 1 |
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wsim.s[3] = (tests & 2) >> 1 |
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wsim.s[1] = 0.0 |
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wsim.s[2] = tests & 1 |
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wsim.s[6] = tests & 1 |
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wsim.s_to_c() |
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wsim.c_prop() |
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wsim.c_to_s() |
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resp = np.array(wsim.s[6], dtype=np.uint8) | (np.array(wsim.s[3], dtype=np.uint8)<<1) |
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resp |= ((resp ^ (resp >> 1)) & 1) << 2 # transitions |
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resp[wsim.pi_s_locs] = logic.UNASSIGNED |
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lsim = LogicSim(wsim.circuit, tests.shape[-1]) |
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lsim.s[0] = logic.mv_to_bp(tests) |
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lsim.s_to_c() |
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lsim.c_prop() |
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lsim.c_to_s() |
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exp = logic.bp_to_mv(lsim.s[1])[:,:tests.shape[-1]] |
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resp[resp == logic.PPULSE] = logic.ZERO |
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resp[resp == logic.NPULSE] = logic.ONE |
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exp[exp == logic.PPULSE] = logic.ZERO |
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exp[exp == logic.NPULSE] = logic.ONE |
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np.testing.assert_allclose(resp, exp) |
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def test_b15(b15_2ig_circuit_resolved, b15_2ig_delays): |
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compare_to_logic_sim(WaveSim(b15_2ig_circuit_resolved, b15_2ig_delays, 8)) |
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def test_b15_strip_forks(b15_2ig_circuit_resolved, b15_2ig_delays): |
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compare_to_logic_sim(WaveSim(b15_2ig_circuit_resolved, b15_2ig_delays, 8, strip_forks=True)) |
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def test_b15_cuda(b15_2ig_circuit_resolved, b15_2ig_delays): |
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compare_to_logic_sim(WaveSimCuda(b15_2ig_circuit_resolved, b15_2ig_delays, 8, strip_forks=True))
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