A python module for parsing, processing, and simulating gate-level circuits.
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import numpy as np
from kyupy import atalanta, logic
def test_parse():
text = '\n'.join([
'* Test pattern file',
'1: 0011',
'2: 1100',
'1010',
])
tf = atalanta.parse(text)
# second-to-last axis = inputs, last axis = patterns
assert tf.patterns.shape == (4, 3)
assert tf.patterns.dtype == np.uint8
assert set(np.unique(tf.patterns)) <= {logic.ZERO, logic.ONE}
# patterns are stored along the last axis
assert list(tf.patterns[:, 0]) == [logic.ZERO, logic.ZERO, logic.ONE, logic.ONE]
assert list(tf.patterns[:, 1]) == [logic.ONE, logic.ONE, logic.ZERO, logic.ZERO]
assert list(tf.patterns[:, 2]) == [logic.ONE, logic.ZERO, logic.ONE, logic.ZERO]
def test_empty():
tf = atalanta.parse('* only comments\n* nothing else\n')
assert tf.patterns.shape == (0, 0)
assert tf.patterns.dtype == np.uint8