A python module for parsing, processing, and simulating gate-level circuits.
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Stefan Holst e6ae009969 updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
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__init__.py Project Import 4 years ago
b01.bench Project Import 4 years ago
b01.v Project Import 4 years ago
b14.sdf.gz updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
b14.stuck.stil.gz updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
b14.transition.stil.gz updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
b14.v.gz updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
conftest.py Project Import 4 years ago
gates.sdf Project Import 4 years ago
gates.v Project Import 4 years ago
test_bench.py Project Import 4 years ago
test_circuit.py Project Import 4 years ago
test_logic_sim.py Project Import 4 years ago
test_packed_vectors.py Project Import 4 years ago
test_sdf.py Project Import 4 years ago
test_stil.py updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago
test_verilog.py Project Import 4 years ago
test_wave_sim.py updated b14 benchmark, update wavesim capture api, expand usage examples 4 years ago