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main
| Author | SHA1 | Date | |
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 stefan
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3193df726f | ||
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stefan
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d247115744 |
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+2
-2
@@ -20,11 +20,11 @@ sys.path.insert(0, os.path.abspath('../src'))
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# -- Project information -----------------------------------------------------
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# -- Project information -----------------------------------------------------
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project = 'KyuPy'
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project = 'KyuPy'
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copyright = '2020-2026, Stefan Holst'
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copyright = '2020-2025, Stefan Holst'
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author = 'Stefan Holst'
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author = 'Stefan Holst'
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# The full version, including alpha/beta/rc tags
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# The full version, including alpha/beta/rc tags
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release = '0.0.7'
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release = '0.0.6'
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# -- General configuration ---------------------------------------------------
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# -- General configuration ---------------------------------------------------
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+1
-1
@@ -1,6 +1,6 @@
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[project]
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[project]
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name = "kyupy"
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name = "kyupy"
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version = "0.0.7"
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version = "0.0.6"
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authors = [
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authors = [
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{ name="Stefan Holst", email="mail@s-holst.de" },
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{ name="Stefan Holst", email="mail@s-holst.de" },
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]
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]
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@@ -448,7 +448,7 @@ class Circuit:
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node_map[n] = Node(self, f'{node.name}~{n.name}', n.kind)
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node_map[n] = Node(self, f'{node.name}~{n.name}', n.kind)
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elif len(n.outs) > 0 and len(n.ins) > 0: # output is also read by impl. circuit, need to add a fork.
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elif len(n.outs) > 0 and len(n.ins) > 0: # output is also read by impl. circuit, need to add a fork.
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node_map[n] = Node(self, f'{node.name}~{n.name}')
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node_map[n] = Node(self, f'{node.name}~{n.name}')
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elif len(n.ins) == 0 and len(n.outs) != 1: # input is read by multiple nodes (or no nodes), need to add fork.
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elif len(n.ins) == 0 and len(n.outs) > 1: # input is read by multiple nodes, need to add fork.
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node_map[n] = Node(self, f'{node.name}~{n.name}')
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node_map[n] = Node(self, f'{node.name}~{n.name}')
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for l in impl.lines: # add all internal lines to main circuit
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for l in impl.lines: # add all internal lines to main circuit
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if l.reader in node_map and l.driver in node_map:
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if l.reader in node_map and l.driver in node_map:
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+2
-2
@@ -217,9 +217,9 @@ def parse(text):
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return Lark(GRAMMAR, parser="lalr", transformer=SdfTransformer()).parse(text)
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return Lark(GRAMMAR, parser="lalr", transformer=SdfTransformer()).parse(text)
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def load(file) -> DelayFile:
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def load(file):
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"""Parses the contents of ``file`` and returns a :class:`DelayFile` object.
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"""Parses the contents of ``file`` and returns a :class:`DelayFile` object.
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Files with `.gz`-suffix are decompressed on-the-fly.
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Files with `.gz`-suffix are decompressed on-the-fly.
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"""
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"""
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return parse(readtext(file)) # type: ignore
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return parse(readtext(file))
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@@ -450,194 +450,3 @@ LATCHX{1,2}$ input(D,CLK) output(Q,QN) Q=LATCH(D,CLK) QN=INV1(Q) ;
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"""The SAED 90nm educational technology library.
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"""The SAED 90nm educational technology library.
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It defines all cells except: negative-edge flip-flops, tri-state, latches, clock gating, level shifters
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It defines all cells except: negative-edge flip-flops, tri-state, latches, clock gating, level shifters
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"""
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"""
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SKY130 = TechLib(r"""
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$decap_{3,4,6,8,12} ;
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$fill_{1,2,4,8} ;
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$tap_{1,2} ;
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$tapvgnd_1 ;
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$tapvgnd2_1 ;
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$tapvpwrvgnd_1 ;
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$lpflow_decapkapwr_{3,4,6,8,12} ;
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$lpflow_bleeder_1 input(SHORT) ;
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$conb_1 output(HI,LO) HI=__const1__() LO=__const0__() ;
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$macro_sparecell output(LO) LO=__const0__() ;
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$diode_2 input(DIODE) ;
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$probe_p_8 input(A) output(X) X=BUF1(A) ;
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$probec_p_8 input(A) output(X) X=BUF1(A) ;
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$inv_{1,2,4,6,8,12,16} input(A) output(Y) Y=INV1(A) ;
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$buf_{1,2,4,6,8,12,16} input(A) output(X) X=BUF1(A) ;
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$bufbuf_{8,16} input(A) output(X) X=BUF1(A) ;
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$bufinv_{8,16} input(A) output(Y) Y=INV1(A) ;
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$clkbuf_{1,2,4,8,16} input(A) output(X) X=BUF1(A) ;
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$clkinv_{1,2,4,8,16} input(A) output(Y) Y=INV1(A) ;
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$clkinvlp_{2,4} input(A) output(Y) Y=INV1(A) ;
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$clkdlybuf4s15_{1,2} input(A) output(X) X=BUF1(A) ;
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$clkdlybuf4s18_{1,2} input(A) output(X) X=BUF1(A) ;
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$clkdlybuf4s25_{1,2} input(A) output(X) X=BUF1(A) ;
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$clkdlybuf4s50_{1,2} input(A) output(X) X=BUF1(A) ;
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$dlygate4sd1_1 input(A) output(X) X=BUF1(A) ;
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$dlygate4sd2_1 input(A) output(X) X=BUF1(A) ;
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$dlygate4sd3_1 input(A) output(X) X=BUF1(A) ;
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$dlymetal6s2s_1 input(A) output(X) X=BUF1(A) ;
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$dlymetal6s4s_1 input(A) output(X) X=BUF1(A) ;
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$dlymetal6s6s_1 input(A) output(X) X=BUF1(A) ;
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$lpflow_clkbufkapwr_{1,2,4,8,16} input(A) output(X) X=BUF1(A) ;
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$lpflow_clkinvkapwr_{1,2,4,8,16} input(A) output(Y) Y=INV1(A) ;
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$lpflow_lsbuf_lh_hl_isowell_tap_{1,2,4} input(A) output(X) X=BUF1(A) ;
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$lpflow_lsbuf_lh_isowell_4 input(A) output(X) X=BUF1(A) ;
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$lpflow_lsbuf_lh_isowell_tap_{1,2,4} input(A) output(X) X=BUF1(A) ;
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$and2_{0,1,2,4} input(A,B) output(X) X=AND2(A,B) ;
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$and2b_{1,2,4} input(A_N,B) output(X) AN=INV1(A_N) X=AND2(AN,B) ;
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$and3_{1,2,4} input(A,B,C) output(X) X=AND3(A,B,C) ;
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$and3b_{1,2,4} input(A_N,B,C) output(X) AN=INV1(A_N) X=AND3(AN,B,C) ;
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$and4_{1,2,4} input(A,B,C,D) output(X) X=AND4(A,B,C,D) ;
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$and4b_{1,2,4} input(A_N,B,C,D) output(X) AN=INV1(A_N) X=AND4(AN,B,C,D) ;
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$and4bb_{1,2,4} input(A_N,B_N,C,D) output(X) AN=INV1(A_N) BN=INV1(B_N) X=AND4(AN,BN,C,D) ;
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$or2_{0,1,2,4} input(A,B) output(X) X=OR2(A,B) ;
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$or2b_{1,2,4} input(A,B_N) output(X) BN=INV1(B_N) X=OR2(A,BN) ;
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$or3_{1,2,4} input(A,B,C) output(X) X=OR3(A,B,C) ;
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$or3b_{1,2,4} input(A,B,C_N) output(X) CN=INV1(C_N) X=OR3(A,B,CN) ;
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$or4_{1,2,4} input(A,B,C,D) output(X) X=OR4(A,B,C,D) ;
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$or4b_{1,2,4} input(A,B,C,D_N) output(X) DN=INV1(D_N) X=OR4(A,B,C,DN) ;
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$or4bb_{1,2,4} input(A,B,C_N,D_N) output(X) CN=INV1(C_N) DN=INV1(D_N) X=OR4(A,B,CN,DN) ;
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$nand2_{1,2,4,8} input(A,B) output(Y) Y=NAND2(A,B) ;
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$nand2b_{1,2,4} input(A_N,B) output(Y) AN=INV1(A_N) Y=NAND2(AN,B) ;
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$nand3_{1,2,4} input(A,B,C) output(Y) Y=NAND3(A,B,C) ;
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$nand3b_{1,2,4} input(A_N,B,C) output(Y) AN=INV1(A_N) Y=NAND3(AN,B,C) ;
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$nand4_{1,2,4} input(A,B,C,D) output(Y) Y=NAND4(A,B,C,D) ;
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$nand4b_{1,2,4} input(A_N,B,C,D) output(Y) AN=INV1(A_N) Y=NAND4(AN,B,C,D) ;
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$nand4bb_{1,2,4} input(A_N,B_N,C,D) output(Y) AN=INV1(A_N) BN=INV1(B_N) Y=NAND4(AN,BN,C,D) ;
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$nor2_{1,2,4,8} input(A,B) output(Y) Y=NOR2(A,B) ;
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$nor2b_{1,2,4} input(A,B_N) output(Y) BN=INV1(B_N) Y=NOR2(A,BN) ;
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$nor3_{1,2,4} input(A,B,C) output(Y) Y=NOR3(A,B,C) ;
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$nor3b_{1,2,4} input(A,B,C_N) output(Y) CN=INV1(C_N) Y=NOR3(A,B,CN) ;
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$nor4_{1,2,4} input(A,B,C,D) output(Y) Y=NOR4(A,B,C,D) ;
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$nor4b_{1,2,4} input(A,B,C,D_N) output(Y) DN=INV1(D_N) Y=NOR4(A,B,C,DN) ;
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$nor4bb_{1,2,4} input(A,B,C_N,D_N) output(Y) CN=INV1(C_N) DN=INV1(D_N) Y=NOR4(A,B,CN,DN) ;
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$xor2_{1,2,4} input(A,B) output(X) X=XOR2(A,B) ;
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$xor3_{1,2,4} input(A,B,C) output(X) X=XOR3(A,B,C) ;
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$xnor2_{1,2,4} input(A,B) output(Y) Y=XNOR2(A,B) ;
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$xnor3_{1,2,4} input(A,B,C) output(X) X=XNOR3(A,B,C) ;
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$maj3_{1,2,4} input(A,B,C) output(X) AB=AND2(A,B) BC=AND2(B,C) AC=AND2(A,C) X=OR3(AB,BC,AC) ;
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$mux2_{1,2,4,8} input(A0,A1,S) output(X) X=MUX21(A0,A1,S) ;
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$mux2i_{1,2,4} input(A0,A1,S) output(Y) M=MUX21(A0,A1,S) Y=INV1(M) ;
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$mux4_{1,2,4} input(A0,A1,A2,A3,S0,S1) output(X) M0=MUX21(A0,A1,S0) M1=MUX21(A2,A3,S0) X=MUX21(M0,M1,S1) ;
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$ha_{1,2,4} input(A,B) output(COUT,SUM) SUM=XOR2(A,B) COUT=AND2(A,B) ;
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$fa_{1,2,4} input(A,B,CIN) output(COUT,SUM) AB=XOR2(A,B) SUM=XOR2(AB,CIN) COUT=AO22(A,B,AB,CIN) ;
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$fah_1 input(A,B,CI) output(COUT,SUM) AB=XOR2(A,B) SUM=XOR2(AB,CI) COUT=AO22(A,B,AB,CI) ;
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$fahcin_1 input(A,B,CIN) output(COUT,SUM) AB=XOR2(A,B) SUM=XOR2(AB,CIN) COUT=AO22(A,B,AB,CIN) ;
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$fahcon_1 input(A,B,CI) output(COUT_N,SUM) AB=XOR2(A,B) SUM=XOR2(AB,CI) T=AO22(A,B,AB,CI) COUT_N=INV1(T) ;
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$a21o_{1,2,4} input(A1,A2,B1) output(X) X=AO21(A1,A2,B1) ;
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$a21bo_{1,2,4} input(A1,A2,B1_N) output(X) BN=INV1(B1_N) X=AO21(A1,A2,BN) ;
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$a22o_{1,2,4} input(A1,A2,B1,B2) output(X) X=AO22(A1,A2,B1,B2) ;
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$a2bb2o_{1,2,4} input(A1_N,A2_N,B1,B2) output(X) AN1=INV1(A1_N) AN2=INV1(A2_N) X=AO22(AN1,AN2,B1,B2) ;
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$a211o_{1,2,4} input(A1,A2,B1,C1) output(X) X=AO211(A1,A2,B1,C1) ;
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$a221o_{1,2,4} input(A1,A2,B1,B2,C1) output(X) T=AO22(A1,A2,B1,B2) X=OR2(T,C1) ;
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$a31o_{1,2,4} input(A1,A2,A3,B1) output(X) AA=AND3(A1,A2,A3) X=OR2(AA,B1) ;
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$a311o_{1,2,4} input(A1,A2,A3,B1,C1) output(X) T=AND2(A1,A2) X=AO211(T,A3,B1,C1) ;
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$a32o_{1,2,4} input(A1,A2,A3,B1,B2) output(X) T=AND2(A1,A2) X=AO22(T,A3,B1,B2) ;
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$a41o_{1,2,4} input(A1,A2,A3,A4,B1) output(X) T1=AND2(A1,A2) T2=AND2(T1,A3) X=AO21(T2,A4,B1) ;
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$a2111o_{1,2,4} input(A1,A2,B1,C1,D1) output(X) T=AO211(A1,A2,B1,C1) X=OR2(T,D1) ;
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$a21oi_{1,2,4} input(A1,A2,B1) output(Y) Y=AOI21(A1,A2,B1) ;
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$a21boi_{0,1,2,4} input(A1,A2,B1_N) output(Y) BN=INV1(B1_N) Y=AOI21(A1,A2,BN) ;
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$a22oi_{1,2,4} input(A1,A2,B1,B2) output(Y) Y=AOI22(A1,A2,B1,B2) ;
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$a2bb2oi_{1,2,4} input(A1_N,A2_N,B1,B2) output(Y) AN1=INV1(A1_N) AN2=INV1(A2_N) Y=AOI22(AN1,AN2,B1,B2) ;
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$a211oi_{1,2,4} input(A1,A2,B1,C1) output(Y) Y=AOI211(A1,A2,B1,C1) ;
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$a221oi_{1,2,4} input(A1,A2,B1,B2,C1) output(Y) T=AO22(A1,A2,B1,B2) Y=NOR2(T,C1) ;
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$a222oi_1 input(A1,A2,B1,B2,C1,C2) output(Y) AB=AO22(A1,A2,B1,B2) Y=AOI21(C1,C2,AB) ;
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$a31oi_{1,2,4} input(A1,A2,A3,B1) output(Y) AA=AND3(A1,A2,A3) Y=NOR2(AA,B1) ;
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$a311oi_{1,2,4} input(A1,A2,A3,B1,C1) output(Y) T=AND2(A1,A2) Y=AOI211(T,A3,B1,C1) ;
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$a32oi_{1,2,4} input(A1,A2,A3,B1,B2) output(Y) T=AND2(A1,A2) Y=AOI22(T,A3,B1,B2) ;
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$a41oi_{1,2,4} input(A1,A2,A3,A4,B1) output(Y) T1=AND2(A1,A2) T2=AND2(T1,A3) Y=AOI21(T2,A4,B1) ;
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$a2111oi_{0,1,2,4} input(A1,A2,B1,C1,D1) output(Y) T=AO211(A1,A2,B1,C1) Y=NOR2(T,D1) ;
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$o21a_{1,2,4} input(A1,A2,B1) output(X) X=OA21(A1,A2,B1) ;
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$o21ba_{1,2,4} input(A1,A2,B1_N) output(X) BN=INV1(B1_N) X=OA21(A1,A2,BN) ;
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$o22a_{1,2,4} input(A1,A2,B1,B2) output(X) X=OA22(A1,A2,B1,B2) ;
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$o2bb2a_{1,2,4} input(A1_N,A2_N,B1,B2) output(X) T=NAND2(A1_N,A2_N) X=OA21(B1,B2,T) ;
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$o211a_{1,2,4} input(A1,A2,B1,C1) output(X) X=OA211(A1,A2,B1,C1) ;
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$o221a_{1,2,4} input(A1,A2,B1,B2,C1) output(X) T=OA22(A1,A2,B1,B2) X=AND2(T,C1) ;
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$o31a_{1,2,4} input(A1,A2,A3,B1) output(X) T=OR3(A1,A2,A3) X=AND2(T,B1) ;
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$o311a_{1,2,4} input(A1,A2,A3,B1,C1) output(X) T=OR2(A1,A2) X=OA211(T,A3,B1,C1) ;
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$o32a_{1,2,4} input(A1,A2,A3,B1,B2) output(X) T=OR3(A1,A2,A3) X=OA21(B1,B2,T) ;
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$o41a_{1,2,4} input(A1,A2,A3,A4,B1) output(X) T=OR4(A1,A2,A3,A4) X=AND2(T,B1) ;
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$o2111a_{1,2,4} input(A1,A2,B1,C1,D1) output(X) T=OA211(A1,A2,B1,C1) X=AND2(T,D1) ;
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$o21ai_{0,1,2,4} input(A1,A2,B1) output(Y) Y=OAI21(A1,A2,B1) ;
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$o21bai_{1,2,4} input(A1,A2,B1_N) output(Y) BN=INV1(B1_N) Y=OAI21(A1,A2,BN) ;
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$o22ai_{1,2,4} input(A1,A2,B1,B2) output(Y) Y=OAI22(A1,A2,B1,B2) ;
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|
||||||
$o2bb2ai_{1,2,4} input(A1_N,A2_N,B1,B2) output(Y) T=NAND2(A1_N,A2_N) Y=OAI21(B1,B2,T) ;
|
|
||||||
$o211ai_{1,2,4} input(A1,A2,B1,C1) output(Y) Y=OAI211(A1,A2,B1,C1) ;
|
|
||||||
$o221ai_{1,2,4} input(A1,A2,B1,B2,C1) output(Y) T=OA22(A1,A2,B1,B2) Y=NAND2(T,C1) ;
|
|
||||||
$o31ai_{1,2,4} input(A1,A2,A3,B1) output(Y) T=OR3(A1,A2,A3) Y=NAND2(T,B1) ;
|
|
||||||
$o311ai_{0,1,2,4} input(A1,A2,A3,B1,C1) output(Y) T=OR2(A1,A2) Y=OAI211(T,A3,B1,C1) ;
|
|
||||||
$o32ai_{1,2,4} input(A1,A2,A3,B1,B2) output(Y) T=OR3(A1,A2,A3) Y=OAI21(B1,B2,T) ;
|
|
||||||
$o41ai_{1,2,4} input(A1,A2,A3,A4,B1) output(Y) T=OR4(A1,A2,A3,A4) Y=NAND2(T,B1) ;
|
|
||||||
$o2111ai_{1,2,4} input(A1,A2,B1,C1,D1) output(Y) T=OA211(A1,A2,B1,C1) Y=NAND2(T,D1) ;
|
|
||||||
|
|
||||||
$dfxtp_{1,2,4} input(CLK,D) output(Q) Q=DFF(D,CLK) ;
|
|
||||||
$dfxbp_{1,2} input(CLK,D) output(Q,Q_N) Q=DFF(D,CLK) Q_N=INV1(Q) ;
|
|
||||||
$dfrtp_{1,2,4} input(CLK,D,RESET_B) output(Q) DR=AND2(D,RESET_B) Q=DFF(DR,CLK) ;
|
|
||||||
$dfrbp_{1,2} input(CLK,D,RESET_B) output(Q,Q_N) DR=AND2(D,RESET_B) Q=DFF(DR,CLK) Q_N=INV1(Q) ;
|
|
||||||
$dfstp_{1,2,4} input(CLK,D,SET_B) output(Q) S=INV1(SET_B) DS=OR2(D,S) Q=DFF(DS,CLK) ;
|
|
||||||
$dfsbp_{1,2} input(CLK,D,SET_B) output(Q,Q_N) S=INV1(SET_B) DS=OR2(D,S) Q=DFF(DS,CLK) Q_N=INV1(Q) ;
|
|
||||||
$dfbbp_1 input(CLK,D,SET_B,RESET_B) output(Q,Q_N) DR=AND2(D,RESET_B) S=INV1(SET_B) DRS=OR2(DR,S) Q=DFF(DRS,CLK) Q_N=INV1(Q) ;
|
|
||||||
$dfrtn_1 input(CLK_N,D,RESET_B) output(Q) CLKN=INV1(CLK_N) DR=AND2(D,RESET_B) Q=DFF(DR,CLKN) ;
|
|
||||||
$dfbbn_{1,2} input(CLK_N,D,SET_B,RESET_B) output(Q,Q_N) CLKN=INV1(CLK_N) DR=AND2(D,RESET_B) S=INV1(SET_B) DRS=OR2(DR,S) Q=DFF(DRS,CLKN) Q_N=INV1(Q) ;
|
|
||||||
|
|
||||||
$sdfxtp_{1,2,4} input(CLK,D,SCD,SCE) output(Q) DI=MUX21(D,SCD,SCE) Q=DFF(DI,CLK) ;
|
|
||||||
$sdfxbp_{1,2} input(CLK,D,SCD,SCE) output(Q,Q_N) DI=MUX21(D,SCD,SCE) Q=DFF(DI,CLK) Q_N=INV1(Q) ;
|
|
||||||
$sdfrtp_{1,2,4} input(CLK,D,SCD,SCE,RESET_B) output(Q) DR=AND2(D,RESET_B) DI=MUX21(DR,SCD,SCE) Q=DFF(DI,CLK) ;
|
|
||||||
$sdfrbp_{1,2} input(CLK,D,SCD,SCE,RESET_B) output(Q,Q_N) DR=AND2(D,RESET_B) DI=MUX21(DR,SCD,SCE) Q=DFF(DI,CLK) Q_N=INV1(Q) ;
|
|
||||||
$sdfstp_{1,2,4} input(CLK,D,SCD,SCE,SET_B) output(Q) S=INV1(SET_B) DS=OR2(D,S) DI=MUX21(DS,SCD,SCE) Q=DFF(DI,CLK) ;
|
|
||||||
$sdfsbp_{1,2} input(CLK,D,SCD,SCE,SET_B) output(Q,Q_N) S=INV1(SET_B) DS=OR2(D,S) DI=MUX21(DS,SCD,SCE) Q=DFF(DI,CLK) Q_N=INV1(Q) ;
|
|
||||||
$sdfbbp_1 input(CLK,D,SCD,SCE,SET_B,RESET_B) output(Q,Q_N) DR=AND2(D,RESET_B) S=INV1(SET_B) DRS=OR2(DR,S) DI=MUX21(DRS,SCD,SCE) Q=DFF(DI,CLK) Q_N=INV1(Q) ;
|
|
||||||
$sdfrtn_1 input(CLK_N,D,SCD,SCE,RESET_B) output(Q) CLKN=INV1(CLK_N) DR=AND2(D,RESET_B) DI=MUX21(DR,SCD,SCE) Q=DFF(DI,CLKN) ;
|
|
||||||
$sdfbbn_{1,2} input(CLK_N,D,SCD,SCE,SET_B,RESET_B) output(Q,Q_N) CLKN=INV1(CLK_N) DR=AND2(D,RESET_B) S=INV1(SET_B) DRS=OR2(DR,S) DI=MUX21(DRS,SCD,SCE) Q=DFF(DI,CLKN) Q_N=INV1(Q) ;
|
|
||||||
|
|
||||||
$edfxtp_1 input(CLK,D,DE) output(Q) GCK=AND2(CLK,DE) Q=DFF(D,GCK) ;
|
|
||||||
$edfxbp_1 input(CLK,D,DE) output(Q,Q_N) GCK=AND2(CLK,DE) Q=DFF(D,GCK) Q_N=INV1(Q) ;
|
|
||||||
$sedfxtp_{1,2,4} input(CLK,D,DE,SCD,SCE) output(Q) DI=MUX21(D,SCD,SCE) GCK=AND2(CLK,DE) Q=DFF(DI,GCK) ;
|
|
||||||
$sedfxbp_{1,2} input(CLK,D,DE,SCD,SCE) output(Q,Q_N) DI=MUX21(D,SCD,SCE) GCK=AND2(CLK,DE) Q=DFF(DI,GCK) Q_N=INV1(Q) ;
|
|
||||||
|
|
||||||
$dlxtp_1 input(D,GATE) output(Q) Q=LATCH(D,GATE) ;
|
|
||||||
$dlxtn_{1,2,4} input(D,GATE_N) output(Q) GN=INV1(GATE_N) Q=LATCH(D,GN) ;
|
|
||||||
$dlxbp_1 input(D,GATE) output(Q,Q_N) Q=LATCH(D,GATE) Q_N=INV1(Q) ;
|
|
||||||
$dlxbn_{1,2} input(D,GATE_N) output(Q,Q_N) GN=INV1(GATE_N) Q=LATCH(D,GN) Q_N=INV1(Q) ;
|
|
||||||
$dlrtp_{1,2,4} input(D,GATE,RESET_B) output(Q) DR=AND2(D,RESET_B) Q=LATCH(DR,GATE) ;
|
|
||||||
$dlrtn_{1,2,4} input(D,GATE_N,RESET_B) output(Q) GN=INV1(GATE_N) DR=AND2(D,RESET_B) Q=LATCH(DR,GN) ;
|
|
||||||
$dlrbp_{1,2} input(D,GATE,RESET_B) output(Q,Q_N) DR=AND2(D,RESET_B) Q=LATCH(DR,GATE) Q_N=INV1(Q) ;
|
|
||||||
$dlrbn_{1,2} input(D,GATE_N,RESET_B) output(Q,Q_N) GN=INV1(GATE_N) DR=AND2(D,RESET_B) Q=LATCH(DR,GN) Q_N=INV1(Q) ;
|
|
||||||
|
|
||||||
$dlclkp_{1,2,4} input(CLK,GATE) output(GCLK) GCLK=AND2(CLK,GATE) ;
|
|
||||||
$sdlclkp_{1,2,4} input(CLK,GATE,SCE) output(GCLK) G=OR2(GATE,SCE) GCLK=AND2(CLK,G) ;
|
|
||||||
|
|
||||||
$ebufn_{1,2,4,8} input(A,TE_B) output(Z) TE=INV1(TE_B) Z=AND2(A,TE) ;
|
|
||||||
$einvn_{0,1,2,4,8} input(A,TE_B) output(Z) TE=INV1(TE_B) ZI=INV1(A) Z=AND2(ZI,TE) ;
|
|
||||||
$einvp_{1,2,4,8} input(A,TE) output(Z) ZI=INV1(A) Z=AND2(ZI,TE) ;
|
|
||||||
|
|
||||||
$lpflow_inputiso0n_1 input(A,SLEEP_B) output(X) X=AND2(A,SLEEP_B) ;
|
|
||||||
$lpflow_inputiso0p_1 input(A,SLEEP) output(X) SB=INV1(SLEEP) X=AND2(A,SB) ;
|
|
||||||
$lpflow_inputiso1n_1 input(A,SLEEP_B) output(X) X=AND2(A,SLEEP_B) ;
|
|
||||||
$lpflow_inputiso1p_1 input(A,SLEEP) output(X) SB=INV1(SLEEP) X=AND2(A,SB) ;
|
|
||||||
$lpflow_isobufsrc_{1,2,4,8,16} input(A,SLEEP) output(X) AI=INV1(A) X=OR2(AI,SLEEP) ;
|
|
||||||
$lpflow_isobufsrckapwr_16 input(A,SLEEP) output(X) AI=INV1(A) X=OR2(AI,SLEEP) ;
|
|
||||||
$lpflow_inputisolatch_1 input(D,SLEEP_B) output(Q) Q=LATCH(D,SLEEP_B) ;
|
|
||||||
""".replace('$','sky130_fd_sc_hd__'))
|
|
||||||
"""SkyWater 130nm High Density Digital Standard Cells (skywater-pdk-libs-sky130_fd_sc_hd).
|
|
||||||
"""
|
|
||||||
@@ -1,211 +0,0 @@
|
|||||||
"""A simple parser for Verilog Change Dump (VCD) files.
|
|
||||||
|
|
||||||
This parser loads the changes into a ndarray of logic values.
|
|
||||||
Axis 0 is the time step, axis 1 is the variable data.
|
|
||||||
All variable values are flattened. Offsets are stored in each variable metadata.
|
|
||||||
"""
|
|
||||||
|
|
||||||
from collections import namedtuple
|
|
||||||
from dataclasses import dataclass, field
|
|
||||||
|
|
||||||
from lark import Lark, Transformer
|
|
||||||
import numpy as np
|
|
||||||
|
|
||||||
from . import readtext, logic
|
|
||||||
|
|
||||||
|
|
||||||
@dataclass
|
|
||||||
class Var:
|
|
||||||
type: str
|
|
||||||
width: int
|
|
||||||
idcode: str
|
|
||||||
reference: str
|
|
||||||
scope: 'Scope'
|
|
||||||
locs: list[int] = field(default_factory=list)
|
|
||||||
|
|
||||||
|
|
||||||
class Scope:
|
|
||||||
def __init__(self, parent, name='', type='module') -> None:
|
|
||||||
self.name = name
|
|
||||||
self.type = type
|
|
||||||
self.parent_scope = parent
|
|
||||||
self.sub_scopes : list[Scope] = []
|
|
||||||
self.vars : list = []
|
|
||||||
|
|
||||||
@property
|
|
||||||
def path(self) -> str:
|
|
||||||
parts = []
|
|
||||||
s = self
|
|
||||||
while s is not None and s.name:
|
|
||||||
parts.append(s.name)
|
|
||||||
s = s.parent_scope
|
|
||||||
return '/'.join(reversed(parts))
|
|
||||||
|
|
||||||
|
|
||||||
class VcdHeader:
|
|
||||||
def __init__(self) -> None:
|
|
||||||
self.comment: str = ''
|
|
||||||
self.date: str = ''
|
|
||||||
self.timescale: str = ''
|
|
||||||
self.version: str = ''
|
|
||||||
self.root_scope = Scope(None)
|
|
||||||
self.current_scope = self.root_scope
|
|
||||||
|
|
||||||
def scope(self, name, type):
|
|
||||||
new_scope = Scope(self.current_scope, name, type)
|
|
||||||
self.current_scope.sub_scopes.append(new_scope)
|
|
||||||
self.current_scope = new_scope
|
|
||||||
|
|
||||||
def upscope(self):
|
|
||||||
assert self.current_scope.parent_scope is not None, "root scope has no parent"
|
|
||||||
self.current_scope = self.current_scope.parent_scope
|
|
||||||
|
|
||||||
def add_var(self, type: str, width: int, idcode: str, reference: str):
|
|
||||||
self.current_scope.vars.append(Var(type, width, idcode, reference, self.current_scope))
|
|
||||||
|
|
||||||
def __repr__(self):
|
|
||||||
lines = [
|
|
||||||
'VcdHeader(',
|
|
||||||
f' comment = {self.comment!r}',
|
|
||||||
f' date = {self.date!r}',
|
|
||||||
f' timescale = {self.timescale!r}',
|
|
||||||
f' version = {self.version!r}',
|
|
||||||
' scopes:',
|
|
||||||
]
|
|
||||||
def fmt_scope(scope, indent=4):
|
|
||||||
lines.append(f'{" " * (indent // 2)}{scope.type}:{scope.name} ({len(scope.vars)} vars)')
|
|
||||||
for sub in scope.sub_scopes:
|
|
||||||
fmt_scope(sub, indent + 2)
|
|
||||||
for sub in self.root_scope.sub_scopes:
|
|
||||||
fmt_scope(sub)
|
|
||||||
lines.append(')')
|
|
||||||
return '\n'.join(lines)
|
|
||||||
|
|
||||||
|
|
||||||
class VcdVarMap:
|
|
||||||
def __init__(self, header: VcdHeader, var_locs = lambda _: []) -> None:
|
|
||||||
self.var_list: list[Var] = []
|
|
||||||
def collect(scope):
|
|
||||||
for v in scope.vars:
|
|
||||||
v.locs = var_locs(v)
|
|
||||||
if v.locs is not None and len(v.locs) > 0:
|
|
||||||
assert len(v.locs) == v.width, f'{v.reference}: len(locs)={len(v.locs)} != width={v.width}'
|
|
||||||
self.var_list.append(v)
|
|
||||||
for sub in scope.sub_scopes:
|
|
||||||
collect(sub)
|
|
||||||
collect(header.root_scope)
|
|
||||||
self.total_width = max((max(v.locs) for v in self.var_list), default=-1) + 1
|
|
||||||
self.idcode2var = {var.idcode: var for var in self.var_list}
|
|
||||||
|
|
||||||
|
|
||||||
class VcdData:
|
|
||||||
def __init__(self, var_map, steps, data):
|
|
||||||
self.var_map = var_map
|
|
||||||
self.steps = steps
|
|
||||||
self.data = data
|
|
||||||
|
|
||||||
|
|
||||||
class VcdHeaderTransformer(Transformer):
|
|
||||||
def __init__(self):
|
|
||||||
super().__init__()
|
|
||||||
self.header = VcdHeader()
|
|
||||||
|
|
||||||
def comment(self, args): self.header.comment = args[0].value.strip()
|
|
||||||
def date(self, args): self.header.date = args[0].value.strip()
|
|
||||||
def timescale(self, args): self.header.timescale = args[0].value.strip()
|
|
||||||
def version(self, args): self.header.version = args[0].value.strip()
|
|
||||||
|
|
||||||
def scope(self, args):
|
|
||||||
type, name = args
|
|
||||||
self.header.scope(name.value, type.value)
|
|
||||||
|
|
||||||
def upscope(self, args):
|
|
||||||
self.header.upscope()
|
|
||||||
|
|
||||||
def var(self, args):
|
|
||||||
type, width, idcode, reference = args
|
|
||||||
reference = reference.strip()
|
|
||||||
width = int(width)
|
|
||||||
self.header.add_var(type, width, idcode, reference)
|
|
||||||
|
|
||||||
def start(self, args):
|
|
||||||
return self.header
|
|
||||||
#return tuple(args) if len(args) > 1 else (args[0], None)
|
|
||||||
|
|
||||||
|
|
||||||
GRAMMAR = r"""
|
|
||||||
start: (_declaration_command)*
|
|
||||||
_declaration_command: ( comment | date | scope | timescale | upscope | var | version ) "$end"
|
|
||||||
comment: "$comment" TEXT?
|
|
||||||
date: "$date" TEXT
|
|
||||||
scope: "$scope" /[^\s]+/ /[^\s]+/
|
|
||||||
timescale: "$timescale" TEXT
|
|
||||||
upscope: "$upscope"
|
|
||||||
var: "$var" /[^\s]+/ /[^\s]+/ /[^\s]+/ TEXT
|
|
||||||
version: "$version" TEXT
|
|
||||||
TEXT: /(?:(?!\$end)[\s\S])+/
|
|
||||||
%ignore ( /\r?\n/ )+
|
|
||||||
%ignore /[\t \f]+/
|
|
||||||
"""
|
|
||||||
|
|
||||||
|
|
||||||
def load(file, var_locs = lambda _: [], step_filter = lambda *_: True):
|
|
||||||
"""Parses the contents of ``file`` as Verilog Change Dump (VCD).
|
|
||||||
|
|
||||||
:param file: A file name or a file handle. Files with `.gz`-suffix are decompressed on-the-fly.
|
|
||||||
:param var_locs: A callback ``(var) -> list[int]`` mapping each variable to ndarray column indices. Empty list drops the variable.
|
|
||||||
:param step_filter: A callback ``(time, values, var_map) -> bool`` to select which timesteps to include.
|
|
||||||
:return: A VcdData object with metadata and an ndarray with all values.
|
|
||||||
"""
|
|
||||||
vcd = readtext(file)
|
|
||||||
header_size = vcd.find('$enddefinitions')
|
|
||||||
assert header_size > 0, "invalid VCD file: end of header not found"
|
|
||||||
vcd_header_str = vcd[:header_size]
|
|
||||||
vcd_header : VcdHeader = Lark(GRAMMAR, parser="lalr", lexer='contextual', transformer=VcdHeaderTransformer()).parse(vcd_header_str) # type: ignore
|
|
||||||
vcd_data = vcd[header_size:].splitlines()
|
|
||||||
var_map = VcdVarMap(vcd_header, var_locs)
|
|
||||||
|
|
||||||
chunk_size = 10240
|
|
||||||
chunks = []
|
|
||||||
chunk = np.full((chunk_size, var_map.total_width), logic.UNASSIGNED, dtype=np.uint8)
|
|
||||||
|
|
||||||
_val_map = {'0': logic.ZERO, '1': logic.ONE,
|
|
||||||
'x': logic.UNKNOWN, 'X': logic.UNKNOWN,
|
|
||||||
'z': logic.UNASSIGNED, 'Z': logic.UNASSIGNED}
|
|
||||||
_pad_char = {'0': '0', '1': '0', 'x': 'x', 'X': 'x', 'z': 'z', 'Z': 'z'}
|
|
||||||
|
|
||||||
current_time = None
|
|
||||||
steps = []
|
|
||||||
step_idx = 0
|
|
||||||
for line in vcd_data:
|
|
||||||
if not line or line[0] == '$':
|
|
||||||
continue
|
|
||||||
if line[0] == '#':
|
|
||||||
if step_filter(current_time, chunk[step_idx], var_map):
|
|
||||||
step_idx += 1
|
|
||||||
steps.append(current_time)
|
|
||||||
if step_idx >= chunk_size:
|
|
||||||
chunks.append(chunk)
|
|
||||||
chunk = np.empty((chunk_size, var_map.total_width), dtype=np.uint8)
|
|
||||||
chunk[0] = chunks[-1][-1]
|
|
||||||
step_idx = 0
|
|
||||||
else:
|
|
||||||
chunk[step_idx] = chunk[step_idx - 1]
|
|
||||||
current_time = int(line[1:])
|
|
||||||
continue
|
|
||||||
if line[0] in ('b', 'B'):
|
|
||||||
value_str, idcode = line[1:].split(None, 1)
|
|
||||||
else:
|
|
||||||
value_str, idcode = line[0], line[1:]
|
|
||||||
var = var_map.idcode2var.get(idcode)
|
|
||||||
if var is None:
|
|
||||||
continue
|
|
||||||
if len(value_str) < var.width:
|
|
||||||
value_str = _pad_char.get(value_str[0], '0') * (var.width - len(value_str)) + value_str
|
|
||||||
for i, c in enumerate(value_str):
|
|
||||||
if var.locs[i] >= 0:
|
|
||||||
chunk[step_idx, var.locs[i]] = _val_map.get(c, logic.UNKNOWN)
|
|
||||||
|
|
||||||
chunks.append(chunk[:step_idx])
|
|
||||||
data = np.concatenate(chunks, axis=0).T
|
|
||||||
return VcdData(var_map, steps, data)
|
|
||||||
@@ -52,14 +52,13 @@ class VerilogTransformer(Transformer):
|
|||||||
@staticmethod
|
@staticmethod
|
||||||
def instantiation(args):
|
def instantiation(args):
|
||||||
pinmap = {}
|
pinmap = {}
|
||||||
if args[2] is not None:
|
for idx, pin in enumerate(args[2:]):
|
||||||
for idx, pin in enumerate(args[2:]):
|
p = pin.children[0]
|
||||||
p = pin.children[0]
|
if isinstance(p, tuple): # named pin
|
||||||
if isinstance(p, tuple): # named pin
|
if p[1] is not None:
|
||||||
if p[1] is not None:
|
pinmap[p[0]] = p[1]
|
||||||
pinmap[p[0]] = p[1]
|
else: # unnamed pin
|
||||||
else: # unnamed pin
|
pinmap[idx] = p
|
||||||
pinmap[idx] = p
|
|
||||||
return Instantiation(args[0], args[1], pinmap)
|
return Instantiation(args[0], args[1], pinmap)
|
||||||
|
|
||||||
@staticmethod
|
@staticmethod
|
||||||
|
|||||||
@@ -434,7 +434,7 @@ class WaveSimCuda(WaveSim):
|
|||||||
grid_dim = self._grid_dim(self.sims, self.s_len)
|
grid_dim = self._grid_dim(self.sims, self.s_len)
|
||||||
wave_assign_gpu[grid_dim, self._block_dim](self.c, self.s, self.c_locs, self.ppi_offset)
|
wave_assign_gpu[grid_dim, self._block_dim](self.c, self.s, self.c_locs, self.ppi_offset)
|
||||||
|
|
||||||
def _grid_dim(self, x, y): return cdiv(int(x), self._block_dim[0]), cdiv(int(y), self._block_dim[1])
|
def _grid_dim(self, x, y): return cdiv(x, self._block_dim[0]), cdiv(y, self._block_dim[1])
|
||||||
|
|
||||||
def c_prop(self, sims=None, seed=1, op_from=0, op_to=None, delta=0):
|
def c_prop(self, sims=None, seed=1, op_from=0, op_to=None, delta=0):
|
||||||
sims = min(sims or self.sims, self.sims)
|
sims = min(sims or self.sims, self.sims)
|
||||||
|
|||||||
Reference in new issue
Block a user