stefan/kyupy - kyupy - Kyutech Global Virtual Lab Git Service

Author	SHA1	Message	Date
Stefan Holst	aea633ac8d	for release 0.0.5 * Techlib: fix NanGate variants * Circuit: more visitor and manipulator utilities * mv_transition: produce stable values when arguments are UNASSIGNED * Verilog: better assign processing * STIL parsing improvements * SDF: conditional parsing (semantics ignored for now), better interconnect annotation, more robust name matching * sim: use ALAP topo-sort * logic_sim: improved fault injection, faster 6V sim * wave_sim: use correct thresholds for pulse filtering, partial delta-sim support, per-sim delay factor * log: fix limiter	11 months ago
Stefan Holst	4bb3f3424a	cond in sdf parser. ignored for now.	3 years ago
Stefan Holst	351d809306	for release 0.0.4 - Circuit: is now pickleable and comparable - Circuit: utilities for locating/indexing io-ports - Verilog: parser fixes, support yosys-style verilog - SDF: parser fixes, full XOR support - STIL: parser fixes - Simulators: faster, up to 4-input cells, pickleable - WaveSim: WSA calculation support - WaveSim: Per-simulation parameters and delays - Logic: Data are now raw numpy arrays - Logic: More tools for bit-packing - Added DEF parser - Better techlib support for NanGate, SAED, GSC180 - Tests and docs improvements	3 years ago
Stefan Holst	35e727e714	better docs, new techlib as default, fix tests	3 years ago
Stefan Holst	f8bf579be2	support concat, bus select, ISOL cells	3 years ago
Stefan Holst	64e1de396f	New m-valued logic arrays, documentation, 0.0.2 - MVArray for multi-valued logic - BPArray for bit-parallel storage layout - Started documenting with Sphinx - Migrated simulators to new BPArray	5 years ago
Stefan Holst	7bcfbf502b	Documentation, cleanup, multi-valued logic	5 years ago
Stefan Holst	0c5a7f56e1	Project Import	6 years ago