From f66953f2d3c9de6b46216f8e8fc3cd69ce12552e Mon Sep 17 00:00:00 2001 From: stefan Date: Mon, 11 May 2026 23:46:18 +0900 Subject: [PATCH] fix sim model gen for undriven outputs --- src/kyupy/sim.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/kyupy/sim.py b/src/kyupy/sim.py index d7e443e..0871a42 100644 --- a/src/kyupy/sim.py +++ b/src/kyupy/sim.py @@ -191,7 +191,7 @@ class SimOps: root_nodes = set([n for n in circuit.s_nodes if len(n.ins) > 0] + [n for n in circuit.nodes if len(n.outs) == 0]) # start from POs, PPOs, and any dangling nodes readers = np.array([1 if l.reader in root_nodes else len(l.reader.outs) for l in circuit.lines], dtype=np.int32) # for ref-counting forks - level_lines = [n.ins[0] for n in root_nodes] + level_lines = [n.ins[0] for n in root_nodes if len(n.ins) > 0 ] # FIXME: Should probably instanciate buffers for PPOs and attach DFF clocks while len(level_lines) > 0: # traverse the circuit level-wise back towards (P)PIs