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beginning simple always block parsing in verilog

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stefan committed 2025-11-27 21:19:59 +09:00
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tests/map_to_minimal.abc
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@@ -1,3 +1,5 @@
# abc -f map_to_minimal.abc
read kyupy_simprims.genlib
read -m all_kyupy_simprims.v
fraig