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capitalize tech libs

devel
Stefan Holst 1 year ago
parent
commit
9bda7a4c57
  1. 6
      src/kyupy/techlib.py

6
src/kyupy/techlib.py

@ -134,7 +134,7 @@ class TechLibNew: @@ -134,7 +134,7 @@ class TechLibNew:
circuit.substitute(n, self.cells[n.kind][0])
nangate = TechLibNew(r"""
NANGATE = TechLibNew(r"""
FILLCELL_X{1,2,4,8,16,32} ;
LOGIC0_X1 output(Z) Z=__const0__() ;
@ -207,7 +207,7 @@ DLL_X{1,2} input(D,GN) output(Q) G=INV1(GN) Q=LATCH(D,G) ; @@ -207,7 +207,7 @@ DLL_X{1,2} input(D,GN) output(Q) G=INV1(GN) Q=LATCH(D,G) ;
# SAED90nm and SAED32nm libraries.
# not included here: negative-edge flip-flops, tri-state, latches, clock gating, level shifters
saed90 = TechLibNew(r"""
SAED90 = TechLibNew(r"""
NBUFFX{2,4,8,16,32}$ input(INP) output(Z) Z=BUF1(INP) ;
AOBUFX{1,2,4}$ input(INP) output(Z) Z=BUF1(INP) ;
DELLN{1,2,3}X2$ input(INP) output(Z)Z=BUF1(INP) ;
@ -294,7 +294,7 @@ LATCHX{1,2}$ input(D,CLK) output(Q,QN) Q=LATCH(D,CLK) QN=INV1(Q) ; @@ -294,7 +294,7 @@ LATCHX{1,2}$ input(D,CLK) output(Q,QN) Q=LATCH(D,CLK) QN=INV1(Q) ;
""".replace('$','{,_LVT,_HVT}'))
saed32 = TechLibNew(r"""
SAED32 = TechLibNew(r"""
NBUFFX{2,4,8,16,32}$ input(A) output(Y) Y=BUF1(A) ;
AOBUFX{1,2,4}$ input(A) output(Y) Y=BUF1(A) ;
DELLN{1,2,3}X2$ input(A) output(Y) Y=BUF1(A) ;

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