From 967a232b1cbcf7aa10317f38c8dfc199d22739bf Mon Sep 17 00:00:00 2001 From: Stefan Holst Date: Sat, 29 Jul 2023 09:45:48 +0900 Subject: [PATCH] fix pulse threshold selection --- src/kyupy/wave_sim.py | 8 ++++---- tests/test_wave_sim.py | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/src/kyupy/wave_sim.py b/src/kyupy/wave_sim.py index 93a107f..c87892d 100644 --- a/src/kyupy/wave_sim.py +++ b/src/kyupy/wave_sim.py @@ -206,25 +206,25 @@ def _wave_eval(op, cbuf, c_locs, c_caps, sim, delays, simctl_int, seed=0): if a == current_t: a_cur += 1 inputs ^= 1 - thresh = delays[a_idx, a_cur & 1, z_val] + thresh = delays[a_idx, a_cur & 1 ^ 1, z_val] a = cbuf[a_mem + a_cur, sim] + delays[a_idx, a_cur & 1, z_val] next_t = cbuf[a_mem + a_cur, sim] + delays[a_idx, (a_cur & 1) ^ 1, z_val ^ 1] elif b == current_t: b_cur += 1 inputs ^= 2 - thresh = delays[b_idx, b_cur & 1, z_val] + thresh = delays[b_idx, b_cur & 1 ^ 1, z_val] b = cbuf[b_mem + b_cur, sim] + delays[b_idx, b_cur & 1, z_val] next_t = cbuf[b_mem + b_cur, sim] + delays[b_idx, (b_cur & 1) ^ 1, z_val ^ 1] elif c == current_t: c_cur += 1 inputs ^= 4 - thresh = delays[c_idx, c_cur & 1, z_val] + thresh = delays[c_idx, c_cur & 1 ^ 1, z_val] c = cbuf[c_mem + c_cur, sim] + delays[c_idx, c_cur & 1, z_val] next_t = cbuf[c_mem + c_cur, sim] + delays[c_idx, (c_cur & 1) ^ 1, z_val ^ 1] else: d_cur += 1 inputs ^= 8 - thresh = delays[d_idx, d_cur & 1, z_val] + thresh = delays[d_idx, d_cur & 1 ^ 1, z_val] d = cbuf[d_mem + d_cur, sim] + delays[d_idx, d_cur & 1, z_val] next_t = cbuf[d_mem + d_cur, sim] + delays[d_idx, (d_cur & 1) ^ 1, z_val ^ 1] diff --git a/tests/test_wave_sim.py b/tests/test_wave_sim.py index 9a09b32..1e2cc67 100644 --- a/tests/test_wave_sim.py +++ b/tests/test_wave_sim.py @@ -5,6 +5,38 @@ from kyupy.logic_sim import LogicSim from kyupy import logic, bench, sim from kyupy.logic import mvarray +def test_xnor2_delays(): + op = (sim.XNOR2, 2, 0, 1, 3, 3, -1, 0, 0) + #op = (0b0111, 4, 0, 1) + c = np.full((4*16, 1), TMAX) # 4 waveforms of capacity 16 + c_locs = np.zeros((4,), dtype='int') + c_caps = np.zeros((4,), dtype='int') + + for i in range(4): c_locs[i], c_caps[i] = i*16, 16 # 1:1 mapping + delays = np.zeros((1, 4, 2, 2)) + delays[0, 0, 0, 0] = 0.031 # A rise -> Z rise + delays[0, 0, 0, 1] = 0.027 # A rise -> Z fall + delays[0, 0, 1, 0] = 0.033 # A fall -> Z rise + delays[0, 0, 1, 1] = 0.037 # A fall -> Z fall + delays[0, 1, 0, 0] = 0.032 # B rise -> Z rise + delays[0, 1, 0, 1] = 0.030 # B rise -> Z fall + delays[0, 1, 1, 0] = 0.038 # B fall -> Z rise + delays[0, 1, 1, 1] = 0.036 # B fall -> Z fall + + simctl_int = np.asarray([0], dtype=np.int32) + + def wave_assert(inputs, output): + for i, a in zip(inputs, c.reshape(-1,16)): a[:len(i)] = i + wave_eval_cpu(op, c, c_locs, c_caps, 0, delays, simctl_int) + for i, v in enumerate(output): np.testing.assert_allclose(c.reshape(-1,16)[2,i], v) + + wave_assert([[TMIN,TMAX],[TMIN,TMAX]], [TMIN,TMAX]) # XNOR(1,1) => 1 + wave_assert([[TMAX,TMAX],[TMIN,TMAX]], [TMAX]) # XNOR(0,1) => 0 + # using Afall/Zfall for pulse length, bug: was using Arise/Zfall + #wave_assert([[0.07, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, 0.101, 0.137, TMAX]) + wave_assert([[0.07, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, TMAX]) + wave_assert([[0.06, 0.10, TMAX], [0.0, TMAX]], [TMIN, 0.03, 0.091, 0.137, TMAX]) + def test_nand_delays(): op = (sim.NAND4, 4, 0, 1, 2, 3, -1, 0, 0) #op = (0b0111, 4, 0, 1)