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					@ -52,7 +52,7 @@ class LogicSim(sim.SimOps):
				@@ -52,7 +52,7 @@ class LogicSim(sim.SimOps):
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					        """ | 
				
			
			
		
	
		
			
				
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					        self.c[self.pippi_c_locs] = self.s[0, self.pippi_s_locs, :self.mdim] | 
				
			
			
		
	
		
			
				
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					    def c_prop(self, sims=None, inject_cb=None, flip_line=-1): | 
				
			
			
		
	
		
			
				
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					    def c_prop(self, sims=None, inject_cb=None, flip_line=-1, flip_mask=None): | 
				
			
			
		
	
		
			
				
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					        """Propagate the input values through the combinational circuit towards the outputs. | 
				
			
			
		
	
		
			
				
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					        Performs all logic operations in topological order. | 
				
			
			
		
	
	
		
			
				
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					@ -68,7 +68,14 @@ class LogicSim(sim.SimOps):
				@@ -68,7 +68,14 @@ class LogicSim(sim.SimOps):
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					        t1 = self.c_locs[self.tmp2_idx] | 
				
			
			
		
	
		
			
				
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					        if self.m == 2: | 
				
			
			
		
	
		
			
				
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					            if inject_cb is None: | 
				
			
			
		
	
		
			
				
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					                _prop_cpu(self.ops, self.c_locs, self.c, int(flip_line)) | 
				
			
			
		
	
		
			
				
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					                if flip_mask is None: | 
				
			
			
		
	
		
			
				
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					                    flip_mask = np.full(self.c.shape[-1], 255, dtype=np.uint8) | 
				
			
			
		
	
		
			
				
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					                else: | 
				
			
			
		
	
		
			
				
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					                    if len(flip_mask) < self.c.shape[-1]: | 
				
			
			
		
	
		
			
				
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					                        flip_mask2 = np.full(self.c.shape[-1], 0, dtype=np.uint8) | 
				
			
			
		
	
		
			
				
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					                        flip_mask2[:len(flip_mask)] = flip_mask | 
				
			
			
		
	
		
			
				
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					                        flip_mask = flip_mask2 | 
				
			
			
		
	
		
			
				
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					                _prop_cpu(self.ops, self.c_locs, self.c, int(flip_line), flip_mask) | 
				
			
			
		
	
		
			
				
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					            else: | 
				
			
			
		
	
		
			
				
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					                for op, o0l, i0l, i1l, i2l, i3l in self.ops[:,:6]: | 
				
			
			
		
	
		
			
				
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					                    o0, i0, i1, i2, i3 = [self.c_locs[x] for x in (o0l, i0l, i1l, i2l, i3l)] | 
				
			
			
		
	
	
		
			
				
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					@ -298,7 +305,7 @@ class LogicSim(sim.SimOps):
				@@ -298,7 +305,7 @@ class LogicSim(sim.SimOps):
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					@numba.njit | 
				
			
			
		
	
		
			
				
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					def _prop_cpu(ops, c_locs, c, flip_line): | 
				
			
			
		
	
		
			
				
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					def _prop_cpu(ops, c_locs, c, flip_line, flip_mask): | 
				
			
			
		
	
		
			
				
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					    for op, o0l, i0l, i1l, i2l, i3l in ops[:,:6]: | 
				
			
			
		
	
		
			
				
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					        o0, i0, i1, i2, i3 = [c_locs[x] for x in (o0l, i0l, i1l, i2l, i3l)] | 
				
			
			
		
	
		
			
				
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					        if op == sim.BUF1: c[o0]=c[i0] | 
				
			
			
		
	
	
		
			
				
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					@ -336,7 +343,8 @@ def _prop_cpu(ops, c_locs, c, flip_line):
				@@ -336,7 +343,8 @@ def _prop_cpu(ops, c_locs, c, flip_line):
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					        elif op == sim.MUX21: c[o0] = (c[i0] & ~c[i2]) | (c[i1] & c[i2]) | 
				
			
			
		
	
		
			
				
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					        else: print(f'unknown op {op}') | 
				
			
			
		
	
		
			
				
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					        if flip_line >= 0 and o0l == flip_line: | 
				
			
			
		
	
		
			
				
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					            c[o0] = ~c[o0] | 
				
			
			
		
	
		
			
				
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					            #n = len(flip_mask) | 
				
			
			
		
	
		
			
				
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					            c[o0] = c[o0] ^ flip_mask | 
				
			
			
		
	
		
			
				
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					class LogicSim6V(sim.SimOps): | 
				
			
			
		
	
	
		
			
				
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