From 4f6b733eb4119f5fd651d080e89b32cdff5f6873 Mon Sep 17 00:00:00 2001 From: Stefan Holst Date: Wed, 26 Jul 2023 17:18:28 +0900 Subject: [PATCH] fix NanGate variants, version bump --- docs/conf.py | 2 +- setup.py | 2 +- src/kyupy/techlib.py | 118 ++++++++++++++++++++++++++++--------------- 3 files changed, 78 insertions(+), 44 deletions(-) diff --git a/docs/conf.py b/docs/conf.py index 53f405e..83cafc9 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -24,7 +24,7 @@ copyright = '2020-2023, Stefan Holst' author = 'Stefan Holst' # The full version, including alpha/beta/rc tags -release = '0.0.4' +release = '0.0.5' # -- General configuration --------------------------------------------------- diff --git a/setup.py b/setup.py index 47ef1f7..1a2ac2d 100644 --- a/setup.py +++ b/setup.py @@ -5,7 +5,7 @@ with open('README.rst', 'r') as f: setup( name='kyupy', - version='0.0.4', + version='0.0.5', description='High-performance processing and analysis of non-hierarchical VLSI designs', long_description=long_description, long_description_content_type='text/x-rst', diff --git a/src/kyupy/techlib.py b/src/kyupy/techlib.py index ce15ed1..7387a6d 100644 --- a/src/kyupy/techlib.py +++ b/src/kyupy/techlib.py @@ -138,21 +138,92 @@ TLATX1 input(C,D) output(Q,QN) Q=LATCH(D,C) QN=INV1(Q) ; """ -_nangate_common = r""" +NANGATE = TechLib(r""" +FILLTIE ; +FILL_X{1,2,4,8,16} ; +ANTENNA input(I) ; + +TIEH output(Z) Z=__const1__() ; +TIEL output(ZN) ZN=__const0__() ; + +BUF_X{1,2,4,8,12,16} input(I) output(Z) Z=BUF1(I) ; +INV_X{1,2,4,8,12,16} input(I) output(ZN) ZN=INV1(I) ; + +CLKBUF_X{1,2,4,8,12,16} input(I) output(Z) Z=BUF1(I) ; +CLKGATETST_X1 input(CLK,E,TE) output(Q) Q=OA21(CLK,E,TE) ; + +AND2_X{1,2} input(A1,A2) output(Z) Z=AND2(A1,A2) ; +AND3_X{1,2} input(A1,A2,A3) output(Z) Z=AND3(A1,A2,A3) ; +AND4_X{1,2} input(A1,A2,A3,A4) output(Z) Z=AND4(A1,A2,A3,A4) ; +NAND2_X{1,2} input(A1,A2) output(ZN) ZN=NAND2(A1,A2) ; +NAND3_X{1,2} input(A1,A2,A3) output(ZN) ZN=NAND3(A1,A2,A3) ; +NAND4_X{1,2} input(A1,A2,A3,A4) output(ZN) ZN=NAND4(A1,A2,A3,A4) ; +OR2_X{1,2} input(A1,A2) output(Z) Z=OR2(A1,A2) ; +OR3_X{1,2} input(A1,A2,A3) output(Z) Z=OR3(A1,A2,A3) ; +OR4_X{1,2} input(A1,A2,A3,A4) output(Z) Z=OR4(A1,A2,A3,A4) ; +NOR2_X{1,2} input(A1,A2) output(ZN) ZN=NOR2(A1,A2) ; +NOR3_X{1,2} input(A1,A2,A3) output(ZN) ZN=NOR3(A1,A2,A3) ; +NOR4_X{1,2} input(A1,A2,A3,A4) output(ZN) ZN=NOR4(A1,A2,A3,A4) ; +XOR2_X1 input(A1,A2) output(Z) Z=XOR2(A1,A2) ; +XNOR2_X1 input(A1,A2) output(ZN) ZN=XNOR2(A1,A2) ; + +MUX2_X1 input(I0,I1,S) output(Z) Z=MUX21(I0,I1,S) ; + +HA_X1 input(A,B) output(CO,S) CO=XOR2(A,B) S=AND2(A,B) ; +FA_X1 input(A,B,CI) output(CO,S) AB=XOR2(A,B) CO=XOR2(AB,CI) S=AO22(CI,A,B) ; + +AOI21_X{1,2} input(A1,A2,B) output(ZN) ZN=AOI21(A1,A2,B) ; +OAI21_X{1,2} input(A1,A2,B) output(ZN) ZN=OAI21(A1,A2,B) ; +AOI22_X{1,2} input(A1,A2,B1,B2) output(ZN) ZN=AOI22(A1,A2,B1,B2) ; +OAI22_X{1,2} input(A1,A2,B1,B2) output(ZN) ZN=OAI22(A1,A2,B1,B2) ; + +DFFRNQ_X1 input(D,RN,CLK) output(Q) DR=AND2(D,RN) Q=DFF(DR,CLK) ; +DFFSNQ_X1 input(D,SN,CLK) output(Q) S=INV1(SN) DS=OR2(D,S) Q=DFF(DS,CLK) ; + +SDFFRNQ_X1 input(D,RN,SE,SI,CLK) output(Q) DR=AND2(D,RN) DI=MUX21(DR,SI,SE) Q=DFF(DI,CLK) ; +SDFFSNQ_X1 input(D,SE,SI,SN,CLK) output(Q) S=INV1(SN) DS=OR2(D,S) DI=MUX21(DS,SI,SE) Q=DFF(DI,CLK) ; + +TBUF_X{1,2,4,8,12,16} input(EN,I) output(Z) Z=BUF1(I) ; + +LHQ_X1 input(D,E) output(Q) Q=LATCH(D,E) ; +""") +"""Nangate 15nm Open Cell Library (NanGate_15nm_OCL_v0.1_2014_06.A). +""" + + +NANGATE45 = TechLib(r""" FILLCELL_X{1,2,4,8,16,32} ; +ANTENNA_X1 input(A) ; LOGIC0_X1 output(Z) Z=__const0__() ; LOGIC1_X1 output(Z) Z=__const1__() ; BUF_X{1,2,4,8,16,32} input(A) output(Z) Z=BUF1(A) ; -CLKBUF_X{1,2,3} input(A) output(Z) Z=BUF1(A) ; +INV_X{1,2,4,8,16,32} input(A) output(ZN) ZN=INV1(A) ; + +CLKBUF_X{1,2,3} input(A) output(Z) Z=BUF1(A) ; +CLKGATETST_X{1,2,4,8} input(CK,E,SE) output(GCK) GCK=OA21(CK,E,SE) ; +CLKGATE_X{1,2,4,8} input(CK,E) output(GCK) GCK=AND2(CK,E) ; +AND2_X{1,2,4} input(A1,A2) output(ZN) ZN=AND2(A1,A2) ; +AND3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=AND3(A1,A2,A3) ; +AND4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=AND4(A1,A2,A3,A4) ; NAND2_X{1,2,4} input(A1,A2) output(ZN) ZN=NAND2(A1,A2) ; NAND3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=NAND3(A1,A2,A3) ; NAND4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=NAND4(A1,A2,A3,A4) ; +OR2_X{1,2,4} input(A1,A2) output(ZN) ZN=OR2(A1,A2) ; +OR3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=OR3(A1,A2,A3) ; +OR4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=OR4(A1,A2,A3,A4) ; NOR2_X{1,2,4} input(A1,A2) output(ZN) ZN=NOR2(A1,A2) ; NOR3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=NOR3(A1,A2,A3) ; NOR4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=NOR4(A1,A2,A3,A4) ; +XOR2_X{1,2} input(A,B) output(Z) Z=XOR2(A,B) ; +XNOR2_X{1,2} input(A,B) output(ZN) ZN=XNOR2(A,B) ; + +MUX2_X{1,2} input(A,B,S) output(Z) Z=MUX21(A,B,S) ; + +HA_X1 input(A,B) output(CO,S) CO=XOR2(A,B) S=AND2(A,B) ; +FA_X1 input(A,B,CI) output(CO,S) AB=XOR2(A,B) CO=XOR2(AB,CI) S=AO22(CI,A,B) ; AOI21_X{1,2,4} input(A,B1,B2) output(ZN) ZN=AOI21(B1,B2,A) ; OAI21_X{1,2,4} input(A,B1,B2) output(ZN) ZN=OAI21(B1,B2,A) ; @@ -162,8 +233,6 @@ OAI22_X{1,2,4} input(A1,A2,B1,B2) output(ZN) ZN=OAI22(A1,A2,B1,B2) ; OAI211_X{1,2,4} input(A,B,C1,C2) output(ZN) ZN=OAI211(C1,C2,A,B) ; AOI211_X{1,2,4} input(A,B,C1,C2) output(ZN) ZN=AOI211(C1,C2,A,B) ; -MUX2_X{1,2} input(A,B,S) output(Z) Z=MUX21(A,B,S) ; - AOI221_X{1,2,4} input(A,B1,B2,C1,C2) output(ZN) BC=AO22(B1,B2,C1,C2) ZN=NOR2(BC,A) ; OAI221_X{1,2,4} input(A,B1,B2,C1,C2) output(ZN) BC=OA22(B1,B2,C1,C2) ZN=NAND2(BC,A) ; @@ -172,14 +241,6 @@ OAI222_X{1,2,4} input(A1,A2,B1,B2,C1,C2) output(ZN) BC=OA22(B1,B2,C1,C2) ZN=OAI2 OAI33_X1 input(A1,A2,A3,B1,B2,B3) output(ZN) AA=OR2(A1,A2) BB=OR2(B1,B2) ZN=OAI22(AA,A3,BB,B3) ; -HA_X1 input(A,B) output(CO,S) CO=XOR2(A,B) S=AND2(A,B) ; - -FA_X1 input(A,B,CI) output(CO,S) AB=XOR2(A,B) CO=XOR2(AB,CI) S=AO22(CI,A,B) ; - -CLKGATE_X{1,2,4,8} input(CK,E) output(GCK) GCK=AND2(CK,E) ; - -CLKGATETST_X{1,2,4,8} input(CK,E,SE) output(GCK) GCK=OA21(CK,E,SE) ; - DFF_X{1,2} input(D,CK) output(Q,QN) Q=DFF(D,CK) QN=INV1(Q) ; DFFR_X{1,2} input(D,RN,CK) output(Q,QN) DR=AND2(D,RN) Q=DFF(DR,CK) QN=INV1(Q) ; DFFS_X{1,2} input(D,SN,CK) output(Q,QN) S=INV1(SN) DS=OR2(D,S) Q=DFF(DS,CK) QN=INV1(Q) ; @@ -191,43 +252,16 @@ SDFFS_X{1,2} input(D,SE,SI,SN,CK) output(Q,QN) S=INV1(SN) DS=OR2(D,S) DI=MU SDFFRS_X{1,2} input(D,RN,SE,SI,SN,CK) output(Q,QN) S=INV1(SN) DS=OR2(D,S) DRS=AND2(DS,RN) DI=MUX21(DRS,SI,SE) Q=DFF(DI,CK) QN=INV1(Q) ; TBUF_X{1,2,4,8,16} input(A,EN) output(Z) Z=BUF1(A) ; + TINV_X1 input(I,EN) output(ZN) ZN=INV1(I) ; TLAT_X1 input(D,G,OE) output(Q) Q=LATCH(D,G) ; DLH_X{1,2} input(D,G) output(Q) Q=LATCH(D,G) ; DLL_X{1,2} input(D,GN) output(Q) G=INV1(GN) Q=LATCH(D,G) ; -""" - -NANGATE = TechLib(_nangate_common + r""" -INV_X{1,2,4,8,16,32} input(I) output(ZN) ZN=INV1(I) ; - -AND2_X{1,2,4} input(A1,A2) output(Z) Z=AND2(A1,A2) ; -AND3_X{1,2,4} input(A1,A2,A3) output(Z) Z=AND3(A1,A2,A3) ; -AND4_X{1,2,4} input(A1,A2,A3,A4) output(Z) Z=AND4(A1,A2,A3,A4) ; -OR2_X{1,2,4} input(A1,A2) output(Z) Z=OR2(A1,A2) ; -OR3_X{1,2,4} input(A1,A2,A3) output(Z) Z=OR3(A1,A2,A3) ; -OR4_X{1,2,4} input(A1,A2,A3,A4) output(Z) Z=OR4(A1,A2,A3,A4) ; -XOR2_X{1,2} input(A1,A2) output(Z) Z=XOR2(A1,A2) ; -XNOR2_X{1,2} input(A1,A2) output(ZN) ZN=XNOR2(A1,A2) ; -""") -"""An newer NANGATE-variant that uses 'Z' as output pin names for AND and OR gates. -""" - - -NANGATE_ZN = TechLib(_nangate_common + r""" -INV_X{1,2,4,8,16,32} input(A) output(ZN) ZN=INV1(A) ; - -AND2_X{1,2,4} input(A1,A2) output(ZN) ZN=AND2(A1,A2) ; -AND3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=AND3(A1,A2,A3) ; -AND4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=AND4(A1,A2,A3,A4) ; -OR2_X{1,2,4} input(A1,A2) output(ZN) ZN=OR2(A1,A2) ; -OR3_X{1,2,4} input(A1,A2,A3) output(ZN) ZN=OR3(A1,A2,A3) ; -OR4_X{1,2,4} input(A1,A2,A3,A4) output(ZN) ZN=OR4(A1,A2,A3,A4) ; -XOR2_X{1,2} input(A,B) output(Z) Z=XOR2(A,B) ; -XNOR2_X{1,2} input(A,B) output(ZN) ZN=XNOR2(A,B) ; """) -"""An older NANGATE-variant that uses 'ZN' as output pin names for AND and OR gates. +"""Nangate 45nm Open Cell Library (NangateOpenCellLibrary_PDKv1_3_v2010_12). +This NANGATE-variant that uses 'ZN' as output pin names for AND and OR gates. """