make sims pickleable
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70caea065e
commit
03802ac9f8
3 files changed
+37
-18
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@@ -84,7 +84,7 @@ def batchrange(nitems, maxsize):
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for offset in range(0, nitems, maxsize):
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yield offset, min(nitems-offset, maxsize)
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class Timer:
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def __init__(self, s=0): self.s = s
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def __enter__(self): self.start_time = time.perf_counter(); return self
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@@ -107,6 +107,8 @@ class Timers:
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tmr = Timers(self.timers)
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for k, v in t.timers.items(): tmr.timers[k] += v
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return tmr
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def dict(self):
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return dict([(k, v.s) for k, v in self.timers.items()])
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class Log:
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+13
-17
@@ -1,5 +1,5 @@
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import math
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from collections import defaultdict
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from bisect import bisect, insort_left
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import numpy as np
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@@ -147,11 +147,7 @@ class SimOps:
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"""
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def __init__(self, circuit, c_caps=1, c_caps_min=1, c_reuse=False, strip_forks=False):
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self.circuit = circuit
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dffs = [n for n in circuit.nodes if 'dff' in n.kind.lower()]
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latches = [n for n in circuit.nodes if 'latch' in n.kind.lower()]
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self.s_nodes = list(circuit.io_nodes) + dffs + latches
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self.s_len = len(self.s_nodes)
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keep_signals = not c_reuse
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self.s_len = len(circuit.s_nodes)
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if isinstance(c_caps, int):
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c_caps = [c_caps] * len(circuit.lines)
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@@ -160,17 +156,17 @@ class SimOps:
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self.zero_idx = len(circuit.lines)
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self.tmp_idx = self.zero_idx + 1
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self.ppi_offset = self.tmp_idx + 1
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self.ppo_offset = self.ppi_offset + len(self.s_nodes)
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self.c_locs_len = self.ppo_offset + len(self.s_nodes)
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self.ppo_offset = self.ppi_offset + self.s_len
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self.c_locs_len = self.ppo_offset + self.s_len
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# translate circuit structure into self.ops
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ops = []
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interface_dict = dict((n, i) for i, n in enumerate(self.s_nodes))
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interface_dict = dict((n, i) for i, n in enumerate(circuit.s_nodes))
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for n in circuit.topological_order():
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if n in interface_dict:
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inp_idx = self.ppi_offset + interface_dict[n]
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if len(n.outs) > 0 and n.outs[0] is not None: # first output of a PI/PPI
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ops.append((BUF1, n.outs[0].index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx))
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ops.append((BUF1, n.outs[0].index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx))
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if 'dff' in n.kind.lower(): # second output of DFF is inverted
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if len(n.outs) > 1 and n.outs[1] is not None:
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ops.append((INV1, n.outs[1].index, inp_idx, self.zero_idx, self.zero_idx, self.zero_idx))
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@@ -254,7 +250,7 @@ class SimOps:
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ref_count[self.tmp_idx] += 1
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# allocate and keep memory for PI/PPI, keep memory for PO/PPO (allocated later)
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for i, n in enumerate(self.s_nodes):
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for i, n in enumerate(circuit.s_nodes):
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if len(n.outs) > 0:
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self.c_locs[self.ppi_offset + i], self.c_caps[self.ppi_offset + i] = h.alloc(c_caps_min), c_caps_min
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ref_count[self.ppi_offset + i] += 1
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@@ -282,7 +278,7 @@ class SimOps:
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o_idx = op[1]
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cap = max(c_caps_min, c_caps[o_idx])
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self.c_locs[o_idx], self.c_caps[o_idx] = h.alloc(cap), cap
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if not keep_signals:
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if c_reuse:
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for loc in free_list:
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h.free(loc)
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@@ -292,19 +288,19 @@ class SimOps:
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self.c_locs[lidx], self.c_caps[lidx] = self.c_locs[stem], self.c_caps[stem]
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# copy memory location to PO/PPO area
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for i, n in enumerate(self.s_nodes):
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for i, n in enumerate(circuit.s_nodes):
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if len(n.ins) > 0:
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self.c_locs[self.ppo_offset + i], self.c_caps[self.ppo_offset + i] = self.c_locs[n.ins[0]], self.c_caps[n.ins[0]]
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self.c_len = h.max_size
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from collections import defaultdict
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self.prim_counts = defaultdict(int)
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for op, _, _, _, _, _ in self.ops: self.prim_counts[names[op]] += 1
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d = defaultdict(int)
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for op, _, _, _, _, _ in self.ops: d[names[op]] += 1
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self.prim_counts = dict(d)
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self.pi_s_locs = np.flatnonzero(self.c_locs[self.ppi_offset+np.arange(len(self.circuit.io_nodes))] >= 0)
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self.po_s_locs = np.flatnonzero(self.c_locs[self.ppo_offset+np.arange(len(self.circuit.io_nodes))] >= 0)
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self.ppio_s_locs = np.arange(len(self.circuit.io_nodes), len(self.s_nodes))
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self.ppio_s_locs = np.arange(len(self.circuit.io_nodes), self.s_len)
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self.pippi_s_locs = np.concatenate([self.pi_s_locs, self.ppio_s_locs])
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self.poppo_s_locs = np.concatenate([self.po_s_locs, self.ppio_s_locs])
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@@ -311,6 +311,27 @@ class WaveSimCuda(WaveSim):
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self._block_dim = (32, 16)
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def __getstate__(self):
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state = self.__dict__.copy()
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state['c'] = np.array(self.c)
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state['s'] = np.array(self.s)
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state['ops'] = np.array(self.ops)
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state['c_locs'] = np.array(self.c_locs)
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state['c_caps'] = np.array(self.c_caps)
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state['delays'] = np.array(self.delays)
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state['params'] = np.array(self.params)
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return state
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def __setstate__(self, state):
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self.__dict__.update(state)
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self.c = cuda.to_device(self.c)
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self.s = cuda.to_device(self.s)
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self.ops = cuda.to_device(self.ops)
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self.c_locs = cuda.to_device(self.c_locs)
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self.c_caps = cuda.to_device(self.c_caps)
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self.delays = cuda.to_device(self.delays)
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self.params = cuda.to_device(self.params)
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def s_to_c(self):
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grid_dim = self._grid_dim(self.sims, self.s_len)
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wave_assign_gpu[grid_dim, self._block_dim](self.c, self.s, self.c_locs, self.ppi_offset)
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