A python module for parsing, processing, and simulating gate-level circuits.
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module gates (a, b, c, o0, o1, o2, o3 );
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input a;
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input b;
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input c;
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output o0;
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output o1;
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output o2;
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output o3;
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AND2_X1 andgate (.A1 ( a ) , .A2 ( b ) , .ZN ( o0 ) ) ;
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NAND2_X1 nandgate (.A1 ( a ) , .A2 ( b ) , .ZN ( o1 ) ) ;
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OAI21_X1 oai21gate (.B1(a), .B2(b), .A(c), .ZN(o2) ) ;
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MUX2_X1 mux2gate (.A(a), .B(b), .S(c), .Z(o3)) ;
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endmodule
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