JPEG_CORE_VVP := jpeg_core_tb.vvp
INFILE        ?= test.jpg
OUTFILE       ?= output.ppm
VVP_FLAGS     ?=

JPEG_CORE_DIR    := core_jpeg/src_v
JPEG_CORE_SRCS   := $(wildcard $(JPEG_CORE_DIR)/*.v)
JPEG_CORE_TB     := jpeg_core_tb.v

.PHONY: all sim clean

all: $(JPEG_CORE_VVP)

$(JPEG_CORE_VVP): $(JPEG_CORE_TB) $(JPEG_CORE_SRCS)
	iverilog -g2005 -Wall -o $@ $^

# Run simulation
sim: $(JPEG_CORE_VVP)
	vvp $< $(VVP_FLAGS) +infile=$(INFILE) +outfile=$(OUTFILE)

clean:
	rm -f $(JPEG_CORE_VVP) $(OUTFILE) *.vcd