# In-Field Testing Using MISR

## Setup

After cloning this repository, run:

```
git submodule init
git submodule update
```

This project uses [Nix](https://nixos.org) to manage reproducible programming environments.

Run `nix develop` to enter a shell with all necessary software.

If `nix` is not installed, follow this [guide](https://librelane.readthedocs.io/en/stable/installation/nix_installation/index.html). No need to clone `librelane` here, but it is good to set up the `extra-substituters` as described in the guide for using LibreLane for making layouts with SkyWater 130nm technology.

## Usage

Compile jpeg decoder core using `iverilog` and run RTL simulation of the jpeg decoder core using `vvp`:
```
nix develop
make
uv run jpeg_core_tb_run_plasma.py
```
Call `uv run jpeg_core_tb_run_plasma.py --help` for more options.

Load synthesized circuits and display statistics (example code):
```
uv run load_sky130_circuits.py
```

Run picorv32's built-in testbench (generate `picorv32/testbench.vcd`):
```
make test_vcd
```
or
```
make test_ez_vcd
```

Import generated VCD with kyupy and convert it to a pattern file for later fault simulation:
```
uv run picorv32_vcd_import.py picorv32/testbench.vcd patterns.npy
```
Call `uv run picorv32_vcd_import.py --help` for more options.


Some `uv` commands work also outside a `nix develop` shell if [uv](https://docs.astral.sh/uv/) is installed on the base system. The script demonstrates how to obtain synthesized netlists via nix derivations [published in this github repository](https://github.com/s-holst/benchmark-circuits). These circuits along with layout and timings are built on-demand (using LibreLane) if not yet available in local nix store.