From 048d23bc1a26d11c1f8e66cae7d9a65a468a4c77 Mon Sep 17 00:00:00 2001
From: stefan <mail@s-holst.de>
Date: Sat, 2 May 2026 23:28:13 +0900
Subject: [PATCH] better docs and vscode config

---
 .vscode/settings.json              |  4 ++++
 README.md                          | 10 +++++++++-
 main.py => load_sky130_circuits.py |  9 +++++----
 3 files changed, 18 insertions(+), 5 deletions(-)
 create mode 100644 .vscode/settings.json
 rename main.py => load_sky130_circuits.py (67%)

diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 0000000..59a11a3
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,4 @@
+{
+    "python.defaultInterpreterPath": "${workspaceFolder}/.venv/bin/python",
+    "python.analysis.extraPaths": ["${workspaceFolder}/kyupy/src"]
+}
diff --git a/README.md b/README.md
index 7289432..38b6617 100644
--- a/README.md
+++ b/README.md
@@ -13,7 +13,7 @@ This project uses [Nix](https://nixos.org) to manage reproducible programming en
 
 Run `nix develop` to enter a shell with all necessary software.
 
-If `nix` is not installed, follow this [guide](https://librelane.readthedocs.io/en/stable/installation/nix_installation/index.html). No need to clone `librelane` here, but it is good to set up the `extra-substituters` as described in the guide for using LibreLane in the future (for making layouts with SkyWater 130nm technology).
+If `nix` is not installed, follow this [guide](https://librelane.readthedocs.io/en/stable/installation/nix_installation/index.html). No need to clone `librelane` here, but it is good to set up the `extra-substituters` as described in the guide for using LibreLane for making layouts with SkyWater 130nm technology.
 
 ## Usage
 
@@ -25,3 +25,11 @@ make
 uv run jpeg_core_tb_run_plasma.py
 ```
 
+Load synthesized circuits and display statistics (example code):
+
+```
+uv run load_sky130_circuits.py
+```
+
+Works also outside a `nix develop` shell if [uv](https://docs.astral.sh/uv/) is installed on the base system. The script demonstrates how to obtain synthesized netlists via nix derivations [published in this github repository](https://github.com/s-holst/benchmark-circuits). These circuits along with layout and timings are built on-demand (using LibreLane) if not yet available in local nix store.
+
diff --git a/main.py b/load_sky130_circuits.py
similarity index 67%
rename from main.py
rename to load_sky130_circuits.py
index 05247de..598fe2c 100755
--- a/main.py
+++ b/load_sky130_circuits.py
@@ -15,10 +15,11 @@ def path_for(circuit: str):
 def verilog_nl_path_for(circuit: str):
     return next(path_for(circuit).glob("*/nl/*.nl.v"))
 
-def main():
-    c = verilog.load(verilog_nl_path_for("picorv32-sky130"), tlib=SKY130)
+def print_circuit_stats(circuit: str):
+    print(circuit)
+    c = verilog.load(verilog_nl_path_for(circuit), tlib=SKY130)
     c.resolve_tlib_cells(SKY130)
-    for kind, count in sorted(c.stats.items()): print(f'{kind:10s} {count}')
+    for kind, count in sorted(c.stats.items()): print(f'  {kind:10s} {count}')
 
 if __name__ == "__main__":
-    main()
+    print_circuit_stats("picorv32-sky130")