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104 lines
4.8 KiB
104 lines
4.8 KiB
#!/usr/bin/env -S uv run |
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import argparse |
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import subprocess |
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from pathlib import Path |
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import numpy as np |
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from kyupy import verilog, bench, log, logic, batchrange, atalanta, stil |
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from kyupy.techlib import techlib_by_name, KYUPY |
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from fsim.static import LineRoles, FaultSet, CircuitPartition |
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from fsim.simple import SAFSimSimple |
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from fsim.incremental import SAFSimIncremental |
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from fsim.ppsfp import SAFSimPPSFP |
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def main(): |
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algorithms = {'simple': SAFSimSimple, 'incr': SAFSimIncremental, 'ppsfp': SAFSimPPSFP} |
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parser = argparse.ArgumentParser(description='A basic stuck-at fault simulator.') |
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parser.add_argument('-t', '--tlib', default='SKY130', help=f'Techlib for verilog circuit. Default: SKY130, available: {sorted(techlib_by_name.keys())}.') |
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parser.add_argument('-p', '--patterns', default='1024', help='Pattern file or number of random patterns to simulate. Default: 1024.') |
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parser.add_argument('-a', '--algorithm', default='simple', help=f'Fault simulation algorithm. Default: simple, available: {sorted(algorithms.keys())}.') |
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parser.add_argument('-o', '--output', default=None, help='Write fault list to given file') |
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parser.add_argument('-k', '--partitions', default=1, help='Partition circuit into partitions') |
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parser.add_argument('--seed', type=int, default=42, help='Random seed for reproducibility. Default: 42.') |
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parser.add_argument('circuit', help='Gate-level verilog, bench, or nix package to import. See available packages: "nix flake show github:s-holst/benchmark-circuits".') |
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args = parser.parse_args() |
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if int(args.partitions) > 1: |
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assert args.algorithm == 'ppsfp', "partitioning is only supported for PPSFP." |
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if not (circuit_path := Path(args.circuit)).exists(): # fallback to published nix package. |
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nix_cmd = f"nix build github:s-holst/benchmark-circuits#{args.circuit} --print-out-paths --no-link" |
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benchmark_path = Path(subprocess.check_output(nix_cmd.split(), text=True).strip()) |
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circuit_path = next(benchmark_path.glob("*/nl/*.nl.v")) |
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log.info(f'loading {circuit_path} ...') |
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if circuit_path.name.endswith('.bench'): |
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args.tlib = techlib_by_name['KYUPY'] |
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c = bench.load(circuit_path) |
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else: |
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args.tlib = techlib_by_name[args.tlib] |
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c = verilog.load(circuit_path, tlib=args.tlib) |
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stats = {k.replace('__',''): v for k, v in c.stats(args.tlib).items() if k.startswith('__') or k.endswith('put')} |
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log.info(f'circuit {stats=}') |
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log.info(f'line role stats={LineRoles(c, args.tlib).stats}') |
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c_resolved = c.copy() |
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c_resolved.resolve_tlib_cells(args.tlib) |
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fs = FaultSet(c, args.tlib, c_resolved) |
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log.info(f'fault sites: {len(fs.fault_sites)}') |
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log.info(f'uncollapsed stuck-at fault count: {len(fs.saf_set)}') |
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log.info(f'collapsed stuck-at fault count: {len(fs.saf_equiv_classes)}') |
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partitions = CircuitPartition(c_resolved, int(args.partitions)) |
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partitions.print_stats() |
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rng = np.random.default_rng(args.seed) |
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if not (tests_path := Path(args.patterns)).exists(): # fallback to random patterns. |
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patterns = rng.choice( |
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[logic.ZERO, logic.ONE], |
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size=(len(c_resolved.s_nodes(KYUPY)), int(args.patterns)), |
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).astype(np.uint8) |
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else: |
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log.info(f'loading {tests_path} ...') |
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if tests_path.name.endswith('.stil'): |
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patterns = stil.load(tests_path).tests(c_resolved) |
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else: |
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patterns = atalanta.load(tests_path).tests(c_resolved) |
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saf_collapsed = np.array(list(fs.saf_equiv_classes.keys()), dtype=np.uint32) |
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rng.shuffle(saf_collapsed) |
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if int(args.partitions) > 1: |
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safsim = algorithms[args.algorithm](c_resolved, min(patterns.shape[1], 10240), partitions.partitions) |
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else: |
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safsim = algorithms[args.algorithm](c_resolved, min(patterns.shape[1], 10240)) |
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log.info(f'{args.algorithm} {safsim.sim=}') |
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fclasses = safsim.classify_faults(saf_collapsed, patterns) |
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log.info(f'{safsim.timers=}') |
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sim_performance = stats['comb'] * len(saf_collapsed) * patterns.shape[1] / safsim.timers['sim'].s |
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log.info(f'fsim performance: {sim_performance:.2e} gfp/s') |
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log.info(f'detected by simulation (collapsed): {len(fclasses["DS"])}/{len(saf_collapsed)} - {len(fclasses["DS"])/len(saf_collapsed)*100:.2f}%') |
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if args.output is not None: |
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out_path = Path(args.output) |
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with open(out_path, 'w') as f: |
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log.info(f'Writing {out_path.absolute()} ...') |
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for flt_rep in fclasses["NO"]: |
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for flt in fs.saf_equiv_classes[flt_rep]: |
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f.write(f'{fs.fault_type_str(flt)}\tNO\t{fs.fault_site_str(c, args.tlib, flt)}\n') |
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for flt_rep in fclasses["DS"]: |
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for flt in fs.saf_equiv_classes[flt_rep]: |
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f.write(f'{fs.fault_type_str(flt)}\tDS\t{fs.fault_site_str(c, args.tlib, flt)}\n') |
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if __name__ == "__main__": |
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main() |