from kyupy import bench
from kyupy.techlib import KYUPY
from fsim.static import LineRoles

def test_trivial_inv():
    c = bench.parse('input(i) output(o) o=INV(i)')
    lr = LineRoles(c, KYUPY)
    assert len(lr.line2roles) == 2
    assert len(lr.roles2lines[LineRoles.LOGIC_OUT]) == 2

def test_input_fanout():
    c = bench.parse('input(i) output(o1) output(o2) o1=INV(i) o2=INV(i)')
    lr = LineRoles(c, KYUPY)
    assert len(lr.line2roles) == 4
    assert len(lr.roles2lines[LineRoles.LOGIC_OUT]) == 4

def test_fanout():
    c = bench.parse('input(i) output(o1) output(o2) ii=INV(i) o1=INV(ii) o2=INV(ii)')
    lr = LineRoles(c, KYUPY)
    assert len(lr.line2roles) == 6
    assert len(lr.roles2lines[LineRoles.LOGIC_OUT]) == 6

def test_s27(s27_bench):
    lr = LineRoles(s27_bench, KYUPY)
    assert len(lr.line2roles) == 34  # total number of signal lines in circuit
    # 2 + 9 + 23 = 34
    assert len(lr.roles2lines[LineRoles.LOGIC_OUT]) == 2
    assert len(lr.roles2lines[LineRoles.LOGIC_SEQ]) == 9
    assert len(lr.roles2lines[LineRoles.LOGIC_OUT|LineRoles.LOGIC_SEQ]) == 23